Gate Array Placement Based on Simulated Annealing Algorithm

YANG Yi-zhong; JIE Guang-jun

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Gate Array Placement Based on Simulated Annealing Algorithm

更新时间：2026-09-04

- Gate Array Placement Based on Simulated Annealing Algorithm
- Vol. 27, Issue 4, Pages: 115-117(2010)
- 作者机构：
  
  合肥工业大学应用物理系,安徽,合肥,230009
- 作者简介：
- 基金信息：
- DOI：
  CLC：
- Published：2010
- 稿件说明：
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杨依忠, 解光军. 基于模拟退火算法的门阵列布局[J]. 微电子学与计算机, 2010, 27(4): 115-117,121.

YANG Yi-zhong, JIE Guang-jun. Gate Array Placement Based on Simulated Annealing Algorithm[J]. 2010, 27(4): 115-117.
杨依忠, 解光军. 基于模拟退火算法的门阵列布局[J]. 微电子学与计算机, 2010, 27(4): 115-117,121. DOI：

YANG Yi-zhong, JIE Guang-jun. Gate Array Placement Based on Simulated Annealing Algorithm[J]. 2010, 27(4): 115-117. DOI：

摘要

通过对集成电路布局问题及模拟退火算法的分析

将模拟退火算法应用于一组门阵列电路进行布局求解和测试.实验结果表明:和标杆电路的结果相比

模拟退火算法在布局效果上显示出其优越性.此外还通过实例对算法中各参数所起作用及取值进行了研究.

Abstract

According to the analysis on placement problems and simulated annealing algorithm

simulated annealing algorithm is applied to a group of gate array circuits to solve placement problems

and experiments show its advantages in placement results by comparing with results of benchmark circuit. In addition

by means of computational example

a study was made on the effect and value adoption of every parameter in the algorithm.

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