Design and Implementation of a Router Supporting QoS for Networks-on-Chip

ZHU Hong-lei; PENG Yuan-xi; MA Zhuo; YIN Ya-ming

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Design and Implementation of a Router Supporting QoS for Networks-on-Chip

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- Design and Implementation of a Router Supporting QoS for Networks-on-Chip
- Vol. 27, Issue 3, Pages: 136-139(2010)
- 作者机构：
  
  国防科技大学计算机学院,湖南,长沙
- 作者简介：
- 基金信息：
- DOI：
  CLC：
- Published：2010
- 稿件说明：
移动端阅览
朱红雷, 彭元喜, 马卓, 尹亚明. 一种支持QoS片上网络路由器的设计与实现[J]. 微电子学与计算机, 2010, 27(3): 136-139.

ZHU Hong-lei, PENG Yuan-xi, MA Zhuo, et al. Design and Implementation of a Router Supporting QoS for Networks-on-Chip[J]. 2010, 27(3): 136-139.
朱红雷, 彭元喜, 马卓, 尹亚明. 一种支持QoS片上网络路由器的设计与实现[J]. 微电子学与计算机, 2010, 27(3): 136-139. DOI：

ZHU Hong-lei, PENG Yuan-xi, MA Zhuo, et al. Design and Implementation of a Router Supporting QoS for Networks-on-Chip[J]. 2010, 27(3): 136-139. DOI：

摘要

设计了一种8端口的NoC路由器.采用简化的VOQ结构

使用双交叉开关

可连接4个IP核

开关调度具有动态、确定和公平的特点

能够提供QoS保证

并有效降低了报文排头阻塞和片上网络面积.Synopsys Design Compiler的综合结果表明

基于0.13m工艺实现后

面积为0.62mm

工作频率可达500MHz.

Abstract

This paper design a router with 8 ports for NoC

which uses a simplified VOQ architecture with dual crossbar

support 4 IP cores

and has dynamic arbitration which is deterministic and fair.The router can support QoS

reduce packets head-of-line (HoL) blocking and area of networks-on-chip effectively.Logical synthesis was performed with the Synopsys Design Compiler using the 0.13m library

the results show that the standard cells area of the router with 8 ports is 0.62mm

and the performance corresponds to 500MHz.

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