A low power switched-capacitor double-delay (DD) topology resonator with the resonance frequency of 25 MHz is presented. By using OPAMP sharing technique

double-sampling technique and low power unit circuit blocks

the power consumption of the resonator circuit is minimized. The resonator is fabricated in the SMIC 0.25μm mixed signal CMOS process

the core area of the circuit is 0.09mm. Tested results shown that at sampling frequency of 100MHz

for a 1kHz bandwith signal

the circuit achieves a SFDR of 77dB at resonance frequency of 25MHz

with the static power dissipation being only 10.5mW.