The Design of Address Generation Unit for Embedded DSP

CHEN Hai-yan; PU Wei; WANG Xun

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The Design of Address Generation Unit for Embedded DSP

更新时间：2026-09-04

- The Design of Address Generation Unit for Embedded DSP
- Vol. 27, Issue 6, Pages: 188-192(2010)
- 作者机构：
  
  国防科技大学计算机学院,湖南,长沙,410073
- 作者简介：
- 基金信息：
- DOI：
  CLC：
- Published：2010
- 稿件说明：
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陈海燕, 蒲伟, 王勋. 嵌入式DSP地址产生部件的设计[J]. 微电子学与计算机, 2010, 27(6): 188-192.

CHEN Hai-yan, PU Wei, WANG Xun. The Design of Address Generation Unit for Embedded DSP[J]. 2010, 27(6): 188-192.
陈海燕, 蒲伟, 王勋. 嵌入式DSP地址产生部件的设计[J]. 微电子学与计算机, 2010, 27(6): 188-192. DOI：

CHEN Hai-yan, PU Wei, WANG Xun. The Design of Address Generation Unit for Embedded DSP[J]. 2010, 27(6): 188-192. DOI：

摘要

地址产生部件(AGU)是DSP芯片的重要组成部分

通过支持多种寻址模式

提高了指令的执行效率.详细介绍了某嵌入式DSP的寻址模式及其指令编码结构

在此基础上设计了该DSP的AGU

使其不仅支持几种特殊的寻址模式

还支持单周期三寻址操作.最后对该AGU进行了优化.结果表明

优化后的AGU在改善性能和功耗的同时能够有效减少数字信号处理算法的执行周期.

Abstract

The address generation unit(AGU) is an important part of DSP

which can improve the efficiency of instruction execution by supporting multi-addressing modes.This paper introduces the addressing mode of an embedded DSP and the structure of its addressing instruction coding in detail.According to it

the AGU of the DSP has been designed and realized

which can support several especial addressing modes and thrice addressing operations in one cycle.The results of optimizing this AGU show that it has not only improved the performance and saved the power dissipation but also reduced the execution cycles of digital signal processing arithmetic.

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Related Author

LI Jia-qi

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Related Institution

Dept. of Precision Instrument Engineering, College of Precision Instrument and Opto-Electronics Engineering, Tianjin University

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