Optimal FPGA Realization of Interpolation Architecture Based on Half-band Filter

SHEN Zhi; WANG Hong-yuan

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Optimal FPGA Realization of Interpolation Architecture Based on Half-band Filter

更新时间：2026-09-04

- Optimal FPGA Realization of Interpolation Architecture Based on Half-band Filter
- Vol. 28, Issue 2, Pages: 15-19(2011)
- 作者机构：
  
  华中科技大学电子与信息工程系,湖北,武汉,430074
- 作者简介：
- 基金信息：
- DOI：
  CLC：
- Published：2011
- 稿件说明：
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沈志, 王宏远. 基于半带滤波器的插值结构FPGA优化实现[J]. 微电子学与计算机, 2011, 28(2): 15-19.

SHEN Zhi, WANG Hong-yuan. Optimal FPGA Realization of Interpolation Architecture Based on Half-band Filter[J]. 2011, 28(2): 15-19.
沈志, 王宏远. 基于半带滤波器的插值结构FPGA优化实现[J]. 微电子学与计算机, 2011, 28(2): 15-19. DOI：

SHEN Zhi, WANG Hong-yuan. Optimal FPGA Realization of Interpolation Architecture Based on Half-band Filter[J]. 2011, 28(2): 15-19. DOI：

摘要

提出了一种在FPGA中以半带滤波器为基础实现插值系统的优化结构.该结构结合半带滤波器自身特性及代数变换

降低了计算复杂度和对系数量化位宽需求

并通过使用多级插值方式降低了滤波器阶数.辅以时间换空间的串行逻辑设计思想

最大可能减少了硬件乘法器的数量.相对传统方法

该结构以极低的资源消耗

获得了很高的滤波性能.

Abstract

A novel interpolation architecture implemented in FPGA chip based on halfband filter is presented in this paper. This architecture

which utilizes the characteristic of halfband filter and the technique of algebraic transformation

has reduced the computation complexity and the requirement to coefficient bit wide. Meanwhile

the ways of decreasing filter order with multistage interpolation are also introduced. By considering area-speed tradeoffs

the number of multiplication elements is reduced to the least. Comparing with the traditional method

the practical design achieves expected design performance with much 1ess logic resource usage.

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