A MDAC Circuit for 12-bit 40-MS/s Low Power Pipelined A/D Converters

CHEN Li-jie; ZHOU Yu-mei

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A MDAC Circuit for 12-bit 40-MS/s Low Power Pipelined A/D Converters

更新时间：2026-09-04

- A MDAC Circuit for 12-bit 40-MS/s Low Power Pipelined A/D Converters
- Vol. 28, Issue 1, Pages: 108-112(2011)
- 作者机构：
  
  中国科学院机构微电子研究所,北京,100029
- 作者简介：
- 基金信息：
- DOI：
  CLC：
- Published：2011
- 稿件说明：
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陈利杰, 周玉梅. 一个用于12位40-MS/s低功耗流水线ADC的MDAC电路设计[J]. 微电子学与计算机, 2011, 28(1): 108-112.

CHEN Li-jie, ZHOU Yu-mei. A MDAC Circuit for 12-bit 40-MS/s Low Power Pipelined A/D Converters[J]. 2011, 28(1): 108-112.
陈利杰, 周玉梅. 一个用于12位40-MS/s低功耗流水线ADC的MDAC电路设计[J]. 微电子学与计算机, 2011, 28(1): 108-112. DOI：

CHEN Li-jie, ZHOU Yu-mei. A MDAC Circuit for 12-bit 40-MS/s Low Power Pipelined A/D Converters[J]. 2011, 28(1): 108-112. DOI：

摘要

文中设计了一个用于12位40MHz采样率低功耗流水线ADC的MDAC电路.通过对运放的分时复用

使得一个电路模块实现了两级MDAC功能

达到降低整个ADC功耗的目的.通过对MDAC结构的改进

使得该模块可以达到12bit精度的要求.通过优化辅助运放的带宽

使得高增益运放能够快速稳定.本设计在TSMC 0.35μm mix signal 3.3V工艺下实现

在40MHz采样频率下

以奈奎斯特采样频率满幅(Vpp=2V)信号输入

其SINAD为73dB

ENOB为11.90bit

SFDR为89dB.整个电路消耗的动态功耗为9mW.

Abstract

A MDAC circuit for 12bit 40MS/s low power pipelined A/D converters is presented.The low power is achieved by using the same OTA in two MDAC stages at different time.A modified MDAC reaching 12bit accuracy was designed.A gain boosted telescopic cascode amplifier was designed by optimizing the GBW of the auxiliary amplifier.The circuit is simulated and analyzed based on TSMC 0.35μm 3.3V CMOS process.Simulation results show that the ENOB is 11.9bit

SFDR is 89dB

SNDR is 73dB.The circuit consumes 9mW.

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