Design of 2-D DCT IP Soft Core Based on Loefflers Algorithm

GUO Bao-zeng; Niu Li; LIU Zhi-ming

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Design of 2-D DCT IP Soft Core Based on Loefflers Algorithm

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- Design of 2-D DCT IP Soft Core Based on Loefflers Algorithm
- Vol. 28, Issue 2, Pages: 136-139(2011)
- 作者机构：
  
  河北大学机构电子信息工程学院,河北,保定,071002
- 作者简介：
- 基金信息：
- DOI：
  CLC：
- Published：2011
- 稿件说明：
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郭宝增, 牛力, 刘志明. 基于Loeffler算法的2-D DCT IP软核设计[J]. 微电子学与计算机, 2011, 28(2): 136-139,144.

GUO Bao-zeng, Niu Li, LIU Zhi-ming. Design of 2-D DCT IP Soft Core Based on Loefflers Algorithm[J]. 2011, 28(2): 136-139.
郭宝增, 牛力, 刘志明. 基于Loeffler算法的2-D DCT IP软核设计[J]. 微电子学与计算机, 2011, 28(2): 136-139,144. DOI：

GUO Bao-zeng, Niu Li, LIU Zhi-ming. Design of 2-D DCT IP Soft Core Based on Loefflers Algorithm[J]. 2011, 28(2): 136-139. DOI：

摘要

提出一种基于Loeffler算法的2-D DCT IP软核设计方法.用移位和加法运算代替乘法运算.为减少芯片占用面积

对乘法系数采用CSD编码

1-D DCT复用技术;为提高电路的速度

采用流水线结构

优化转置矩阵. 基于上述算法

设计了用Verilog HDL 语言描述的IP软核. 对软核进行了编译、综合、布局布线和后仿真

验证了算法的正确性. 实验结果显示最高工作频率可以达到139.43 MHz

能够满足视频图像压缩的实时性要求.

Abstract

This paper presents a design of 2-D DCT IP soft core based on Loeffler′s algorithm. We make use of the shifter and addition operations to replace the multiplication operations. In order to save hardware resources

the multiplication factors are coded by CSD

and the technology of 1-D DCT reusing is taken; In order to improve the circuit speed

the pipelining technology is taken

and optimize the transposed matrices is adopted. Based on abovementioned algorithms the IP soft core with Verilog HDL is obtained. For the IP soft core

we made the compiling

synthesis

layout and post simulation

so the correctness of the design is verified. The experiment shows that design has a maximum frequency of 139.43 MHz

which can satisfy the requirement of real-time video image compression.

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