Design for a Transceiver Apply to CAN BUS

TANG Xing-gang; HE Ke-jun; WANG Li; LI Chuan-nan

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Design for a Transceiver Apply to CAN BUS

更新时间：2026-09-04

- Design for a Transceiver Apply to CAN BUS
- Vol. 28, Issue 5, Pages: 125-129(2011)
- 作者机构：
  
  1. 1 华东光电集成器件研究所,江苏,苏州,215163
  2. 2 集成光电子国家重点联合实验室吉林大学实验区吉林大学电子科学与工程学院,吉林,长春,130012
- 作者简介：
- 基金信息：
- DOI：
  CLC：
- Published：2011
- 稿件说明：
移动端阅览
唐兴刚, 贺克军, 王丽, 李传南. 一款CAN总线收发器芯片的电路设计[J]. 微电子学与计算机, 2011, 28(5): 125-129.

TANG Xing-gang, HE Ke-jun, WANG Li, et al. Design for a Transceiver Apply to CAN BUS[J]. 2011, 28(5): 125-129.
唐兴刚, 贺克军, 王丽, 李传南. 一款CAN总线收发器芯片的电路设计[J]. 微电子学与计算机, 2011, 28(5): 125-129. DOI：

TANG Xing-gang, HE Ke-jun, WANG Li, et al. Design for a Transceiver Apply to CAN BUS[J]. 2011, 28(5): 125-129. DOI：

摘要

文中完成一款应用于CAN总线的收发器芯片的电路设计.重点阐述了该收发器芯片的功能框图及其工作原理

特别是接收模块和过压保护的设计.该电路采用5V电源

驱动总线负载为R=60Ω、C=200pF.仿真结果表明该电路工作时的平均电流为35.7mA

电路总的延迟时间为160ns

具有较好的过压保护功能

可应用于高速CAN总线通讯中.

Abstract

In this paper

a transceiver for CAN bus is designed.The functional diagram and the designation on over-voltage protection and receiver module of this transceiver are principally introduced.The power supply of this chip is 5V

and this chip can drive a load such as 60Ω resistance and 200pF capacitance.Simulations show that its average current is 35.7mA and the total delay is 160ns when the circuit works.With the good performance of over-voltage protection

this circuit can be applied in the communication of high-speed CAN bus.

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Related Institution

1 College of Science, Beijing Information Science & Technology University

2 Institute of Microelectronics, Tsinghua University

1 School of Electronic Information, Jiangsu University of Science and Technology

2 Department of Electronic and Information, Zhenjiang College

3 Jiangsu Jiecheng Automobile Electronic Information Co., Ltd. Zhenijiang

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