A Microprocessor Co-verification Platform Based on PLI and Simics

ZHOU Wen-tao; FAN Xiao-ya; HUANG Xiao-ping

Chinese

您当前的位置：

首页 >

文章列表页 >

A Microprocessor Co-verification Platform Based on PLI and Simics

更新时间：2026-09-04

- A Microprocessor Co-verification Platform Based on PLI and Simics
- Vol. 27, Issue 11, Pages: 162-165(2010)
- 作者机构：
  
  西北工业大学航空微电子中心,陕西,西安,710072
- 作者简介：
- 基金信息：
- DOI：
  CLC：
- Published：2010
- 稿件说明：
移动端阅览
周文涛, 樊晓桠, 黄小平. 一种基于PLI和Simics的微处理器协同验证平台[J]. 微电子学与计算机, 2010, 27(11): 162-165.

ZHOU Wen-tao, FAN Xiao-ya, HUANG Xiao-ping. A Microprocessor Co-verification Platform Based on PLI and Simics[J]. 2010, 27(11): 162-165.
周文涛, 樊晓桠, 黄小平. 一种基于PLI和Simics的微处理器协同验证平台[J]. 微电子学与计算机, 2010, 27(11): 162-165. DOI：

ZHOU Wen-tao, FAN Xiao-ya, HUANG Xiao-ping. A Microprocessor Co-verification Platform Based on PLI and Simics[J]. 2010, 27(11): 162-165. DOI：

摘要

面向微处理器验证

构建了一种基于Verilog PLI和Simics模拟器的微处理器验证平台.该平台通过Verilog PLI

利用设计的控制模块将待测微处理器设计模型与Simics模拟器相连

协同自动化比较运行结果.该平台应用在龙腾R处理器的验证中.结果显示该平台有效增加了验证人员对验证过程的可观测性和可控性

具有灵活性高

仿真速度快等特点.

Abstract

We setup a microprocessor co-verification platform based on Verilog PLI and Simics for microprocessor verification. By the Verilog PLI

the platform connects the design microprocessor module with Simics

and compares the results automatically. The platform was used in "Longtium R" microprocessor verification. The results show that this platform enhances the observability and control of the verification process

and is characterized by lightness

quickness of simulation.

关键词

Keywords

references

Views

下载量

CSCD

Alert me when the article has been cited

提交

Tools

Publicity Resources

Simulation on the DC characteristics of double heterojunction p-GaN HEMT with AlN/GaN hybrid buffer layer

A feature-oriented context understanding and slice analysis network for tuberculosis detection

Aerial vehicle detection algorithm based on multi-scale fusion and small-object enhancement

Aerial small object detection algorithm based on improved RT-DETR

A review of large model development: technological evolution from BERT to Deepseek

Related Author

No data

Related Institution

No data

AI问答

Postal code：100079
Tel：（010）53879206 Email：tmw@bjxintong.com.cn
Technical support is provided by Beijing Founder electronics co., LTD 京ICP备09082226号-64 京公网安备11010602201714号
It is recommended to read the content of this site in Chrome&IE9+. Please switch to extreme mode in browser 360.
Cookies We use cookies to help provide and enhance our service and tailor content. By continuing, you agree to the use of cookies.

⁰