Clock Strategy and Its Enhancement for Reducing Baseband Chips Power Dissipation

CHENG Ceng; LI Tong-he; MA Lin; HE You-zhi; ZHENG Xiao-qing

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Clock Strategy and Its Enhancement for Reducing Baseband Chips Power Dissipation

更新时间：2026-09-04

- Clock Strategy and Its Enhancement for Reducing Baseband Chips Power Dissipation
- Vol. 29, Issue 2, Pages: 91-94(2012)
- 作者机构：
  
  1. 1 西安交通大学电子与信息工程学院微电子学系,陕西,西安,710049
  2. 2 西安电子科技大学微电子学院,陕西,西安,710071
  3. 3 西安交通大学电子物理与器件教育部重点实验室电子与信息工程学院,陕西,西安,710049
- 作者简介：
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- Published：2012
- 稿件说明：
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程曾, 李同合, 马林, 何有志, 郑晓庆. 一种降低基带芯片功耗的时钟策略及改进方案[J]. 微电子学与计算机, 2012, 29(2): 91-94.

CHENG Ceng, LI Tong-he, MA Lin, et al. Clock Strategy and Its Enhancement for Reducing Baseband Chips Power Dissipation[J]. 2012, 29(2): 91-94.
程曾, 李同合, 马林, 何有志, 郑晓庆. 一种降低基带芯片功耗的时钟策略及改进方案[J]. 微电子学与计算机, 2012, 29(2): 91-94. DOI：

CHENG Ceng, LI Tong-he, MA Lin, et al. Clock Strategy and Its Enhancement for Reducing Baseband Chips Power Dissipation[J]. 2012, 29(2): 91-94. DOI：

摘要

为了更为有效地降低手机基带芯片中GSM通讯模块的功耗

将门控时钟策略和GSM通讯模块的特点结合起来

用硬件电路精确控制GSM通讯模块的休眠

并且对可能遇到提前唤醒的场景提出了改进方法

EDA软件仿真和FPGA验证了该方法可以达到明显的功耗优化效果.

Abstract

In order to reduce the power dissipation of GSM module of baseband chips more effectively

this paper combined clock gating and GSM modules feature together

and controlled its power consumption precisely with hardware circuits;and enhancement method was proposed also for pre-wakeup situations.The results of EDA simulation and FPGA verification show that the proposed method can reduce the power dissipation obviously.

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