A Template-Based Compiling System Design for Coarse -Grained Reconfigurable Processors

XIE Yuwei; GE Bingjing; SHENG Weiguang; WANG Qin; MAO Zhigang

Chinese

您当前的位置：

首页 >

文章列表页 >

A Template-Based Compiling System Design for Coarse -Grained Reconfigurable Processors

更新时间：2026-09-04

- A Template-Based Compiling System Design for Coarse -Grained Reconfigurable Processors
- Vol. 30, Issue 7, Pages: 37-41(2013)
- 作者机构：
  
  上海交通大学微电子学院,上海,200240
- 作者简介：
- 基金信息：
- DOI：
  CLC：
- Published：2013
- 稿件说明：
移动端阅览
谢羽威, 葛冰晶, 绳伟光, 王琴, 毛志刚. 基于模板的粗粒度可重构处理器编译环境设计[J]. 微电子学与计算机, 2013, 30(7): 37-41.

XIE Yuwei, GE Bingjing, SHENG Weiguang, et al. A Template-Based Compiling System Design for Coarse -Grained Reconfigurable Processors[J]. 2013, 30(7): 37-41.
谢羽威, 葛冰晶, 绳伟光, 王琴, 毛志刚. 基于模板的粗粒度可重构处理器编译环境设计[J]. 微电子学与计算机, 2013, 30(7): 37-41. DOI：

XIE Yuwei, GE Bingjing, SHENG Weiguang, et al. A Template-Based Compiling System Design for Coarse -Grained Reconfigurable Processors[J]. 2013, 30(7): 37-41. DOI：

摘要

粗粒度可重构处理器以优良的结构和出色的性能日益受到广泛的应用，其丰富的运算资源为应用程序高效并发执行提供了可能。本文面向REmus II粗粒度可重构处理器硬件架构，首次提出一种基于模板的程序编译方法。从应用程序中的计算密集型代码出发，定义了程序模板的格式和规范，建立模板开发的设计流程，设计了面向视频图像处理的程序模板库。在此基础上，面向程序员设计了基于模板的程序语言标注技术，并最终完成了相应编译环境的构建。实验结果表明，该编译环境有效提高了编译后代码在可重构处理器上执行效率和编译速度。

Abstract

Coarse -grained reconfigurable processors are increasingly popular by their optimized architecture and outstanding performance

which make it possible for applications to run with high parallel efficiency.In this paper we introduce for the first time a template -based compiling system on REmus II coarse -grained reconfigurable processor.Starting from the compute -bound code parts

we create a template -lib system for typical multimedia decoder algorithms

which involves the template structure and developing flow design. Then we complete the compiling system with an annotation technique on programming codes.The results show that the compiling system effectively increases the compiled codesoperating efficiency as well as the compiling speed.

关键词

Keywords

references

Views

下载量

CSCD

Alert me when the article has been cited

提交

Tools

Publicity Resources

A Task Compilation Framework Design for a Heterogeneous Course-Grained Reconfigurable Processor

Cluster Assign Algorithm Based on Subgraph for DSP Compiler

Monte carlo analysis of V-layout trench SiC neutron detector

A high-efficiency charge pump for ultra-low voltage boost systems

Microservices anomaly detection based on the correlation of monitoring metrics

Related Author

LOU Jie-chao

SHENG Wei-guang

HE Wei-feng

MAO Zhi-gang

ZHENG Qi-long

WANG Sheng

XIA Fei

Related Institution

Department of Microelectronics, School of Electronic Information and Electrical Engineering, Shanghai Jiao Tong University

Department of Computer Science, USTC

AI问答

Postal code：100079
Tel：（010）53879206 Email：tmw@bjxintong.com.cn
Technical support is provided by Beijing Founder electronics co., LTD 京ICP备09082226号-64 京公网安备11010602201714号
It is recommended to read the content of this site in Chrome&IE9+. Please switch to extreme mode in browser 360.
Cookies We use cookies to help provide and enhance our service and tailor content. By continuing, you agree to the use of cookies.

⁰