This paper reports a circuit design of waveform synthesis for chirp signal using DDWS (Direct Digital Waveform Synthesis).Two schemes are developed to generate a clock signal.In the first method

the clock signal is provide by FPGA. And in the second one

it is provided by a clock generator. This paper compares system performance to generate chirp waveform from these two schemes.System performance is improved by optimizing the design of the clock generating circuit.The system designed in this paper has a high SNR

a simple structure

and a high precision clock.