A Design of Ultra-Low-Voltage Quadrature VCO

LI Jing; LIU Hui-hua

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A Design of Ultra-Low-Voltage Quadrature VCO

更新时间：2026-09-04

- A Design of Ultra-Low-Voltage Quadrature VCO
- Vol. 31, Issue 2, Pages: 161-164(2014)
- 作者机构：
  
  电子科技大学电子科学技术研究院,四川,成都,610054
- 作者简介：
- 基金信息：
- DOI：
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- Published：2014
- 稿件说明：
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李静, 刘辉华. 超低电压正交压控振荡器设计[J]. 微电子学与计算机, 2014, 31(2): 161-164.

LI Jing, LIU Hui-hua. A Design of Ultra-Low-Voltage Quadrature VCO[J]. 2014, 31(2): 161-164.
李静, 刘辉华. 超低电压正交压控振荡器设计[J]. 微电子学与计算机, 2014, 31(2): 161-164. DOI：

LI Jing, LIU Hui-hua. A Design of Ultra-Low-Voltage Quadrature VCO[J]. 2014, 31(2): 161-164. DOI：

摘要

提出一种新的低压正交压控振荡器（QVCO）结构，该结构由两个完全相同的低压压控振荡器经过背栅耦合方式实现.背栅耦合方式使压控振荡器实现正交的输出时钟并且降低了功耗和输出相位噪声.该设计中的QV-CO电路采用中芯国际0.13μm 1P8M标准CM OS工艺，可以工作在0.35 V的电源电压下，总的功耗为1.75mW，输出时钟频率为5.34 GHz，偏离主频1 M Hz处的相位噪声为-110.5 dBc/Hz，对应该相位噪声的FOM （Figure-Of-Merit）为-182.62dBc/Hz，频率调谐范围为4.92~5.34 GHz.该QVCO可以在更低的电源电压下实现低的相位噪声，且拥有较高的FOM值.

Abstract

A new quadrature voltage-controlled oscillator (QVCO) topology is proposed which consists of two same traditional low voltage-controlled oscillator and it is achieved by using back-gates coupling.The use of back-gates makes quadrature output clocks of voltage-controlled oscillator

reduces power dissipation and phase noise.QVCO of the design use a standard 0.13 μm 1P8M CMOS technology.At a supply voltage of 0.35 V

the total power dissipation is 1.75 mW.The frequence of output clock is 5.34 GHz.The phase noise at 1M Hz offset is-110.5 dBc/Hz

and the FOM (Figure-Of-Merit) is-182.62 dBc/Hz.The tuning range is from 4.92 GHz to 5.34 GHz.It is comparable or better than that of other state-of-the-art QVCO designs operating at much higher supply voltage.

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