Research and Hardware Implementation of Particle Filter for Spatial Localization

LEI Jian-ming; HUANG Di; WANG Zhen; ZOU Zhi-ge

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Research and Hardware Implementation of Particle Filter for Spatial Localization

更新时间：2026-09-04

- Research and Hardware Implementation of Particle Filter for Spatial Localization
- Vol. 31, Issue 6, Pages: 8-11(2014)
- 作者机构：
  
  华中科技大学光学与电子信息学院,湖北,武汉,430074
- 作者简介：
- 基金信息：
- DOI：
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- Published：2014
- 稿件说明：
移动端阅览
雷鑑铭, 黄迪, 王真, 邹志革. 适用于空间定位的粒子滤波算法研究及实现[J]. 微电子学与计算机, 2014, 31(6): 8-11.

LEI Jian-ming, HUANG Di, WANG Zhen, et al. Research and Hardware Implementation of Particle Filter for Spatial Localization[J]. 2014, 31(6): 8-11.
雷鑑铭, 黄迪, 王真, 邹志革. 适用于空间定位的粒子滤波算法研究及实现[J]. 微电子学与计算机, 2014, 31(6): 8-11. DOI：

LEI Jian-ming, HUANG Di, WANG Zhen, et al. Research and Hardware Implementation of Particle Filter for Spatial Localization[J]. 2014, 31(6): 8-11. DOI：

摘要

针对传统的移动节点定位方法主要应用在二维平面内的局限性，提出一种适用于三维空间定位的粒子滤波算法.考虑到移动节点定位的实时性，将算法用硬件实现.针对粒子滤波算法运算量大、并行度低的问题，对其进行改进，降低算法的计算复杂度，采用流水线架构，使整体运算速度变高，而且资源消耗较少.通过SystemC进行架构设计，进一步提高硬件设计的效率.最后在FPGA上完成算法的硬件实现，实验结果表明改进算法与硬件实现方案有良好的定位精度，硬件消耗为6 826个逻辑单元，平均执行时间降低了约1/3.

Abstract

As the traditional node localization method was mainly used for two-dimensional plane node

presented a hardware implementation of particle filter for spatial node localization. For the problem of large amount of computation and low degree of parallelism

optimized particle filter algorithm. Proposed a hardware architecture that made the computing speed higher

and decreased resource consumption. Pipelining architecture was carried out through SystemC language

bringing to further improvement of the design efficiency. The experimental study on FPGA indicated that the proposed particle filters algorithm has good positioning accuracy. Hardware consuming was 6 826 logic cells

and the average execution time was reduced by about 1/3.

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