A FPGA Verification and Test System for Cryptographic Chip Based on PCIE

LIU Xue-guang; LI Shu-guo

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A FPGA Verification and Test System for Cryptographic Chip Based on PCIE

更新时间：2026-09-04

- A FPGA Verification and Test System for Cryptographic Chip Based on PCIE
- Vol. 31, Issue 11, Pages: 79-82(2014)
- 作者机构：
  
  清华大学微电子所,北京,100084
- 作者简介：
- 基金信息：
- DOI：
  CLC：
- Published：2014
- 稿件说明：
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刘学光, 李树国. 一种基于PCIE的FPGA密码芯片验证测试系统[J]. 微电子学与计算机, 2014, 31(11): 79-82,87.

LIU Xue-guang, LI Shu-guo. A FPGA Verification and Test System for Cryptographic Chip Based on PCIE[J]. 2014, 31(11): 79-82.
刘学光, 李树国. 一种基于PCIE的FPGA密码芯片验证测试系统[J]. 微电子学与计算机, 2014, 31(11): 79-82,87. DOI：

LIU Xue-guang, LI Shu-guo. A FPGA Verification and Test System for Cryptographic Chip Based on PCIE[J]. 2014, 31(11): 79-82. DOI：

摘要

搭建了一种基于PCIE通信的用于密码芯片的FPGA验证与测试系统.该系统针对SM234密码芯片的验证测试

提出了一种芯片流片前后验证测试的方法.在芯片流片前利用FPGA实现密码芯片逻辑

以验证密码芯片的功能

降低芯片的流片风险.同时

为密码芯片后期测试提供一种可行的测试方案

以缩短密码芯片的后期测试时间.鉴于密码芯片三种密码算法的高速数据传输要求

系统选择PCIE作为板卡的数据传输总线来提高验证测试系统的效率.

Abstract

This paper builds a FPGA verification and test system for cryptographic chip based on PCIE communication.The system provides the method of FPGA verification before tapeout and test after tapeout for SM234 cryptographic chip.Using FPGA implements logic of the cryptographic chip to verify the chip function and reduce the risk of tapeout.Meanwhile

the system provides a feasible chip test scheme for the post test to cut down the test time.Given the requirement of high-speed data transmission

the system selects the PCIE bus to complete the data transmission between card and computer

improves the efficiency of SM234 cryptographic chip verification and test plan.

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Related Institution

Department of Computer Science and Technology, Lvliang University, Lvliang

The 58 th Research Institute, China Electronics Technology Group Corp.

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