A Design of DES IP Core Based on AHB Bus

LIU Mu-xuan; ZHANG Shu-dan; TANG Cai-bin

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A Design of DES IP Core Based on AHB Bus

更新时间：2026-09-04

- A Design of DES IP Core Based on AHB Bus
- Vol. 31, Issue 10, Pages: 69-71(2014)
- 作者机构：
  
  1. 江南大学
  2. 中国电子科技集团公司第58研究所
- 作者简介：
- 基金信息：
- DOI：
  CLC：
- Published：2014
- 稿件说明：
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柳沐璇, 张树丹, 唐彩彬. 一种基于AHB总线的DESIP核设计[J]. 微电子学与计算机, 2014, 31(10): 69-71.

LIU Mu-xuan, ZHANG Shu-dan, TANG Cai-bin. A Design of DES IP Core Based on AHB Bus[J]. 2014, 31(10): 69-71.
柳沐璇, 张树丹, 唐彩彬. 一种基于AHB总线的DESIP核设计[J]. 微电子学与计算机, 2014, 31(10): 69-71. DOI：

LIU Mu-xuan, ZHANG Shu-dan, TANG Cai-bin. A Design of DES IP Core Based on AHB Bus[J]. 2014, 31(10): 69-71. DOI：

摘要

设计了一款带有通用AHB总线从机接口的DES IP核

能在500MHz频率的总线下很好地工作

DES模式下加、解密转换速率可达到1.6Gb/s

3DES模式下加、解密转换速率可达到615Mb/s.用VCS软件仿真并用DC软件综合后结果均符合设计要求.

Abstract

This paper presents a DES IP core equipped with a AHB Slave Interface.It works perfectly with a bus frequency of 500 MHz.The maximum sustained conversion rate for DES is around 1.6Gb/s.And it is around 615Mb/s for 3DES.After simulating by VCS and synthesizing by DC

results show that it fulfills the design require.

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Related Institution

College of Physics, Liaoning University

Beijing Hongsi Electronic Technology Co. Ltd

1 School of Aeronautics and Astronautics, Air Force Engineering University

2 Beijing Military Region Air Force Air Traffic Control Center

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