Design of 32-channel and High-resolution TDC Circuit

DUAN Lin; CENG Yun

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Design of 32-channel and High-resolution TDC Circuit

更新时间：2026-09-04

- Design of 32-channel and High-resolution TDC Circuit
- Vol. 31, Issue 4, Pages: 148-151(2014)
- 作者机构：
  
  湖南大学物理与微电子科学学院,湖南,长沙,410082
- 作者简介：
- 基金信息：
- DOI：
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- Published：2014
- 稿件说明：
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段霖, 曾云. 32通道高精度时间数字转换电路设计[J]. 微电子学与计算机, 2014, 31(4): 148-151,155.

DUAN Lin, CENG Yun. Design of 32-channel and High-resolution TDC Circuit[J]. 2014, 31(4): 148-151.
段霖, 曾云. 32通道高精度时间数字转换电路设计[J]. 微电子学与计算机, 2014, 31(4): 148-151,155. DOI：

DUAN Lin, CENG Yun. Design of 32-channel and High-resolution TDC Circuit[J]. 2014, 31(4): 148-151. DOI：

摘要

介绍了一种在FPGA中基于Wave Union技术而实现的32通道高精度时间数字转换器（time-to-digital convertor，TDC）电路.利用加法器进位链的进位延迟，输入击中前沿产生wave union送到进位链-寄存器阵列结构中做多次测量，有效地细分了进位链中的超宽码（ultra-wide bins），提高了时间间隔测量精度.经过初步的时序仿真和硬件测试，验证结果表明该T DC电路基本满足设计要求.

Abstract

A 32-channel and high-resolution Wave Union time-to-digital converter (TDC) implemented in FPGA is presented.Utilizing time delay in carry chain of adders

leading edge of input hit launches a “wave union” into the carry chain-register array structure

in which multiple measurements are made to effectively subdivide the ultra-wide bins and improve measurement resolution.Timing simulation and hardware testing results show that the TDC circuit basically fulfills the design requirements.

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