Cyclic Redundancy Check (CRC) has already been used in the field of computer network widely.There are two kind of simple architecture processing bits serially:Type I

Type II.The existing reverse CRC method based on generating checksum by II and decoding it by I

the circuits were different so that model design was not easy.Depending on property of circuit I and II

full state transition matrix

CRC and its isomorphic reverse decoding method was derived even if initial registers state was not zeros.Thus

processing architecture is same but parameters is different when generating and decoding CRC.Architecture can be optimized to improve the processing rate if needed.Finally

examples verified the correctness of isomorphic reverse decoding.