Design of DMA Controller Supporting Full-duplex Data Transmission and Multi-channel

SHI Wen-xia; WU Long-sheng; SHEGN Ting-yi; AI Diao; CHEN Qing-yu

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Design of DMA Controller Supporting Full-duplex Data Transmission and Multi-channel

更新时间：2026-09-04

- Design of DMA Controller Supporting Full-duplex Data Transmission and Multi-channel
- Vol. 32, Issue 2, Pages: 76-79(2015)
- 作者机构：
  
  西安微电子技术研究所,陕西,西安,710054
- 作者简介：
- 基金信息：
- DOI：
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- Published：2015
- 稿件说明：
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石文侠, 吴龙胜, 盛廷义, 艾刁, 陈庆宇. 一种支持全双工数据传输的多通道DMA控制器设计[J]. 微电子学与计算机, 2015, 32(2): 76-79,83.

SHI Wen-xia, WU Long-sheng, SHEGN Ting-yi, et al. Design of DMA Controller Supporting Full-duplex Data Transmission and Multi-channel[J]. 2015, 32(2): 76-79.
石文侠, 吴龙胜, 盛廷义, 艾刁, 陈庆宇. 一种支持全双工数据传输的多通道DMA控制器设计[J]. 微电子学与计算机, 2015, 32(2): 76-79,83. DOI：

SHI Wen-xia, WU Long-sheng, SHEGN Ting-yi, et al. Design of DMA Controller Supporting Full-duplex Data Transmission and Multi-channel[J]. 2015, 32(2): 76-79. DOI：

摘要

针对DMA数据传输中读写操作互斥及互锁问题

本文提出了一种基于AHB总线的流水化DMA控制器设计方案.通过内嵌两个AHB主机和数据缓冲区

实现了数据读写操作并行;通过多通道设计

避免了读写访问不能同时结束时的额外传输等待时间

使读写操作更独立.该设计与现有的DMA控制器相比

缩短了数据传输延迟

提高了数据传输效率

实现了全双工流水传输.

Abstract

For the exclusive and interlocking problems in DMA data reading and writing operations

the DMA design scheme based on AHB bus is proposed. Read and write operations parallel execution is implemented by embedded two AHB masters and a data buffer.Multi-channel design which avoids the additional time wasted when read and write access can’t end synchronously make the read and write operation more independent.Compared with the existing design of DMA controller

the design reduces the transmission delay and improves the speed of data transfer with achieving full-duplex streaming transmission.

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