Crosstalk Analysis and Optimization of Metal Layers for On-Chip Transformers in Silicon RFIC

ZHANG Feng; QU Cao; ZHAO Ting

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Crosstalk Analysis and Optimization of Metal Layers for On-Chip Transformers in Silicon RFIC

更新时间：2026-09-04

- Crosstalk Analysis and Optimization of Metal Layers for On-Chip Transformers in Silicon RFIC
- Vol. 33, Issue 6, Pages: 1-5(2016)
- 作者机构：
  
  中国科学院机构自动化研究所,北京,100190
- 作者简介：
- 基金信息：
- DOI：
  CLC：
- Published：2016
- 稿件说明：
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张峰, 屈操, 赵婷. 硅基片上变压器层间串扰与屏蔽优化[J]. 微电子学与计算机, 2016, 33(6): 1-5.

ZHANG Feng, QU Cao, ZHAO Ting. Crosstalk Analysis and Optimization of Metal Layers for On-Chip Transformers in Silicon RFIC[J]. 2016, 33(6): 1-5.
张峰, 屈操, 赵婷. 硅基片上变压器层间串扰与屏蔽优化[J]. 微电子学与计算机, 2016, 33(6): 1-5. DOI：

ZHANG Feng, QU Cao, ZHAO Ting. Crosstalk Analysis and Optimization of Metal Layers for On-Chip Transformers in Silicon RFIC[J]. 2016, 33(6): 1-5. DOI：

摘要

提出了一种基于共面波导传输线栅格屏蔽原理的片上变压器层间串扰屏蔽结构.通过场路结合、协同仿真的方法比较分析了该结构对片上变压器层间串扰的影响.结果表明: 该屏蔽结构能有效屏蔽硅基片上变压器层间电磁场的渗透

对改善片上变压器的高频性能、屏蔽片上变压器的层间串扰效应有较好的效果.

Abstract

This paper analyzes the on-chip transformer crosstalk effects between the layers

and the extraction of the on-chip transformer parameter and interconnection transmission lines modeling are studied. In order to reduce losses caused by the crosstalk effects

patterned shield structure which based on the principle of coplanar waveguide transmission lines shielding grid is proposed. Finally

the influence of patterned shield structure to on-chip transformer interlayer crosstalk is analyzed by the method of CO simulation. The results show that the shielding structure effectively decouples the interconnect lines of on-chip transformers.

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references

Maheswari M, Seetharaman G. Enhanced low complex double error correction coding with crosstalk avoidance for reliable on-chip interconnection link[J]. Journal of Electronic Testing, 2014, 30(4): 387-400. DOI: 387

Hsieh H I, Shih S F. Effects of transformer structures on the noise balancing and cancellation mechanisms of switching power converters[C]// Power Electronics Conference (IPEC-Hiroshima 2014 - ECCE-ASIA), 2014 International. Japan, Hiroshima, IEEE, 2014: 2380-2384.

Zhao W, Cao Y. Predictive technology model for nano-CMOS design exploration[J]. ACM Journal on Emerging Technologies in Computing Systems (JETC), 2007, 3(1): 1-3. DOI: 1

Shirmohammadi Z, Miremadi SG. Crosstalk avoidance coding for reliable data transmission of network on chips[C]// System on Chip (SoC), 2013 International Symposium on. Finlan, Tampere, IEEE, 2013: 1-4.

邱城波. 基于传递函数的片上变压器及HEMT器件建模[D]. 杭州: 杭州电子科技大学, 2013.

Liu S, Shi H, Feng L. Transformer harmonic loss model considering skin effect and proximity effect[J]. Electric Power Automation Equipment, 2015, 35(3): 133-139. DOI: 133

Han B, Wang D W F. A broadband reduced equivalent circuits for on-chip millimeter-wave asymmetrical transformer[J]. International Journal of Electronics Letters, 2014, 3(1): 24-33. DOI: 24

Franc A, Pistono E, Meunier G, et al. A lossy circuit model based on physical interpretation for integrated shielded slow-wave CMOS coplanar waveguide structures[J]. IEEE Transactions on Microwave Theory % Techniques, 2013, 61(2): 754-763. DOI: 754

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