Background Timing-Skew Calibration Algorithm for the TIADC Based on Zero-Crossing Detection

WANG Xiao-lei; WANG Yu-ying; CHEN Hong-mei; YIN Yong-sheng

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Background Timing-Skew Calibration Algorithm for the TIADC Based on Zero-Crossing Detection

更新时间：2026-09-04

- Background Timing-Skew Calibration Algorithm for the TIADC Based on Zero-Crossing Detection
- Vol. 33, Issue 5, Pages: 72-75(2016)
- 作者机构：
  
  合肥工业大学微电子设计研究所,安徽,合肥,230009
- 作者简介：
- 基金信息：
- DOI：
  CLC：
- Published：2016
- 稿件说明：
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王晓蕾, 王玉莹, 陈红梅, 尹勇生. 基于过零检测的TIADC时钟失配校准算法[J]. 微电子学与计算机, 2016, 33(5): 72-75, 79.

WANG Xiao-lei, WANG Yu-ying, CHEN Hong-mei, et al. Background Timing-Skew Calibration Algorithm for the TIADC Based on Zero-Crossing Detection[J]. 2016, 33(5): 72-75.
王晓蕾, 王玉莹, 陈红梅, 尹勇生. 基于过零检测的TIADC时钟失配校准算法[J]. 微电子学与计算机, 2016, 33(5): 72-75, 79. DOI：

WANG Xiao-lei, WANG Yu-ying, CHEN Hong-mei, et al. Background Timing-Skew Calibration Algorithm for the TIADC Based on Zero-Crossing Detection[J]. 2016, 33(5): 72-75. DOI：

摘要

针对时间交织模数转换器(Time-Interleaved Analog-to-Digital Converter

TIADC)的时钟失配设计了一种基于过零检测的后台校准算法.该算法通过比较通道间采样值过零的个数判断时钟误差的大小

再利用提取到的误差大小控制可变延时的延时大小对时钟误差进行校正.通过MATLAB建立8位五通道TIADC为模型对算法进行验证

当/=0.461时

仿真结果表明

经本算法校准后ENOB从5.16位提升到7.88位

SNR从32.8 dB提高到了49.4 dB

从而验证了该校准算法的正确性和有效性.此外

该校准算法对输入信号的频率没有严格的要求

且可以扩展到任意通道数.

Abstract

A background calibration technique

which is based on zero-crossing detection method

for clock mismatch in Time-Interleaved Analog-to-Digital Converter (TIADC) is proposed. The error is achieved by comparing the amount of zero-crossing in channels to control the delay for the purpose of timing skew calibration. The algorithm is verified by an 8 bits 5-channels TI ADC MATLAB model. The simulation result shows that the ENOB rises from 5.16 bits to 7.88 bits

and the SNR rises from 32.8 dB to 49.4 dB at the /=0.461

which means the correctness and effectiveness of the algorithm is validated. The presented calibration in this paper has no restriction on the input signal frequency

and can be extended to arbitrary number of channels.

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references

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吴光林. 多通道时间交叉ADC校准技术研究及实现[D]. 南京: 东南大学, 2006.

Jamal S M, Fu D H, Hurst P J, et al. A 10 b 120 Msample/s time-interleaved analog-to-digital converter with digital background calibration[J]. IEEE Journal of Solid-State Circuits, 2002, 37(12): 1618-1627. DOI: 1618

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叶凡. 多通道时间交织模数转换器的校正与集成电路实现方法研究[D]. 上海: 复旦大学, 2010.

Wang ChungYi, Wu JiehTsorng. A multiphase timing-skew calibration technique using Zero-Crossing Detection[J]. IEEE Journal of Solid-State Circuits, 2009, 56(6): 1102-1114. DOI: 1102

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