Design of An Interrupt Controller for Multi-core Processor

ZHANG Hai-jin; ZHANG Xun-ying; XIAO Jian-qing

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Design of An Interrupt Controller for Multi-core Processor

更新时间：2026-09-04

- Design of An Interrupt Controller for Multi-core Processor
- Vol. 33, Issue 7, Pages: 69-73(2016)
- 作者机构：
  
  西安微电子技术研究所,陕西,西安,710054
- 作者简介：
- 基金信息：
- DOI：
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- Published：2016
- 稿件说明：
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张海金, 张洵颖, 肖建青. 一种多核处理器中断控制器的设计[J]. 微电子学与计算机, 2016, 33(7): 69-73.

ZHANG Hai-jin, ZHANG Xun-ying, XIAO Jian-qing. Design of An Interrupt Controller for Multi-core Processor[J]. 2016, 33(7): 69-73.
张海金, 张洵颖, 肖建青. 一种多核处理器中断控制器的设计[J]. 微电子学与计算机, 2016, 33(7): 69-73. DOI：

ZHANG Hai-jin, ZHANG Xun-ying, XIAO Jian-qing. Design of An Interrupt Controller for Multi-core Processor[J]. 2016, 33(7): 69-73. DOI：

摘要

为适应多核处理器对中断处理的需求

基于Open PIC协议设计实现了一种多核处理器的中断控制器

并使用VHDL语言对其进行了硬件描述.该中断控制器作为APB从机

能够根据中断的目标、优先级的配置情况以及处理器核的中断处理情况实现中断在多个处理器核间的自由分配.本文将中断仲裁、选择和分配进行流水化处理

从而实现中断的快速准确分配.

Abstract

To meet the needs of multi-core processor for interrupt handling

this paper designs and implements an interrupt controller for multi-core processor based on the Open PIC protocol. The structure of the interrupt controller is described by VHDL. As a slave of Advanced Peripheral Bus (APB)

this interrupt controller can dispatch interrupts based on the interrupts destination and priority

the interrupt handling of the processor cores is also considered. With the pipeline of interrupt arbitration

selection and dispatch

this interrupt controller can dispatch interrupts quickly and accurately.

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references

Dall C, Nieh J. KVM/ARM: the design and implementation of the linux ARM hypervisor[J]. ACM SIGARCH Computer Architecture News, 2014, 42(1): 333-348. DOI: 333

The open programmable interrupt controller (PIC) register interface specification, revision 1.2[R]. US: Advanced Micro Devices and Cyrix Corporation, 1995.

Embleton S, Sparks S, Zou C C. SMM rootkit: a new breed of OS independent malware[J]. Security and Communication Networks, 2013, 6(12): 1590-1605. DOI: 1590

Tumeo A, Branca M, Camerini L, et al. An interrupt controller for FPGA-based multiprocessors[C]// Proceedings of 2007 International Connference on Embedded Computer Systems: Architectures, Modeling and Simulation(IC-SAMOS 2007). USA, Samos, 2007: 82-87.

Multiprocessor interrupt controller data book, revision 1.2[R]. New York: International Business Machine Corporation, 2011.

王龙杰, 胡越黎, 刘廷尧, 等. 多核MV12片上系统中断控制器的设计与实现[J]. 半导体技术, 2012, 37(10): 755-759. DOI: 755

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