Analysis and Optimization of High-Efficiency Standard Cells Operating With in Wide-Range Supply Voltage

WANG Jing-rui; LI Xiang-yu

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Analysis and Optimization of High-Efficiency Standard Cells Operating With in Wide-Range Supply Voltage

更新时间：2026-09-04

- Analysis and Optimization of High-Efficiency Standard Cells Operating With in Wide-Range Supply Voltage
- Vol. 33, Issue 8, Pages: 72-75(2016)
- 作者机构：
  
  清华大学微电子学研究所,北京,100084
- 作者简介：
- 基金信息：
- DOI：
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- Published：2016
- 稿件说明：
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王京睿, 李翔宇. 高能效宽电压工作标准单元库分析与优化[J]. 微电子学与计算机, 2016, 33(8): 72-75.

WANG Jing-rui, LI Xiang-yu. Analysis and Optimization of High-Efficiency Standard Cells Operating With in Wide-Range Supply Voltage[J]. 2016, 33(8): 72-75.
王京睿, 李翔宇. 高能效宽电压工作标准单元库分析与优化[J]. 微电子学与计算机, 2016, 33(8): 72-75. DOI：

WANG Jing-rui, LI Xiang-yu. Analysis and Optimization of High-Efficiency Standard Cells Operating With in Wide-Range Supply Voltage[J]. 2016, 33(8): 72-75. DOI：

摘要

研究了剔除大扇入逻辑门对于高电源电压下的电路指标的影响

证实这一方法对电路在高电压下的性能和功耗没有明显的负面影响

主要影响是在一定程度上增大电路的面积.分别对32 nm标准单元库中的异步置位复位D触发器单元和电平移位器单元进行了电路优化

使得它们在低电压下的延时分别减少了14.6%和19.9%

解决了电源电压降至近阈值时性能恶化过于严重的问题.

Abstract

In this paper

we study the influence of Eliminating big fan-in logic gates method

and finally prove that circuit synthesized with this method behaves little performance deterioration or energy increase

its main effect is increasing circuit area in some cases. We also optimize the structure of D flip-flop with asynchronous set and reset

and voltage up level shifter

which reduces their transition delay for 14.6% and 19.9% when operated at low source voltage

respectively. Thus our work solve the problem which is induced by the performance deterioration of near-threshold operating.

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references

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Nitin Borkar, Vivek De, Shekhar Borkar et al. A 280mV-to-1.2V wide-operating-range IA-32 processor in 32nm CMOS[C]// ISSCC. San Francisco, CA: IEEE, 2012: 66-68.

S J Surhud Khare. Prospects of Near-Threshold Voltage Design for Green Computing[C]// proceedings of the 26th International Conference on VLSI Design. Pune: IEEE, 2013. 120-124.

A Steven K Hsu, Mark A Anders, Sanu K Mathew, et al. A 280 mV-to-1.1 V 256b reconfigurable SIMD vector permutation engine with 2-dimensional shuffle in 22 nm tri-gate CMOS[J]. JSSC, 2012: 48(1): 118-127. DOI: 118

M A Himanshu Kaul, Steven Hsu, Amit Agarwal, et al. Near-threshold voltage (NTV) design—opportunities and challenges[C]//DAC. San Francisco, CA: IEEE, 2012: 1149-1154.

S L Wei Jin, Weifeng He, Zhigang Mao. A 230mV 8-bit sub-threshold microprocessor for wireless sensor network[C]//VLSISoC. Hong Kong: IEEE, 2011: 126-129.

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