A Temper-Resistant Detecting Technique Against Physical Attack

ZHANG Yun; ZHAO Yi-qiang; LIU Jun-wei; LI Xue-min; YANG Song

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A Temper-Resistant Detecting Technique Against Physical Attack

更新时间：2026-09-04

- A Temper-Resistant Detecting Technique Against Physical Attack
- Vol. 33, Issue 4, Pages: 121-124(2016)
- 作者机构：
  
  1. 天津大学电子信息工程学院,天津,300072
  2. 信息工程大学密码工程学院,河南,郑州,450002
- 作者简介：
- 基金信息：
- DOI：
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- Published：2016
- 稿件说明：
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张赟, 赵毅强, 刘军伟, 李雪民, 杨松. 一种抗物理攻击防篡改检测技术[J]. 微电子学与计算机, 2016, 33(4): 121-124.

ZHANG Yun, ZHAO Yi-qiang, LIU Jun-wei, et al. A Temper-Resistant Detecting Technique Against Physical Attack[J]. 2016, 33(4): 121-124.
张赟, 赵毅强, 刘军伟, 李雪民, 杨松. 一种抗物理攻击防篡改检测技术[J]. 微电子学与计算机, 2016, 33(4): 121-124. DOI：

ZHANG Yun, ZHAO Yi-qiang, LIU Jun-wei, et al. A Temper-Resistant Detecting Technique Against Physical Attack[J]. 2016, 33(4): 121-124. DOI：

摘要

提出一种应用于高安全芯片的抗侵入式物理攻击防篡改检测技术

利用芯片顶层金属对侵入式攻击进行主动实时监测

可有效地防止侵入式攻击对电路存储关键信息的提取.提出了针对大规模电路的随机哈密顿回路版图优化加速生成算法

能够在较短时间内生成高无序、大格点量的拓扑结构.本方法可增加攻击者实施侵入式攻击所需的时间与成本

提升大尺寸高安全芯片的物理防护能力.

Abstract

A temper resistant detecting technique applied in high security chips is proposed in this paper.The method utilize the topmost layer to monitor attack behaviors in real time

which prevents the key information stored in circuits from being stolen.An optimized algorithm for generating a random hamilton path of the layout in VLSI circuits is proposed.Using this algorithm

a highly disordered topology with a large area can be generated in a short time.The proposed method can increase the time and cost for the invasive attacks and improve the physical defense ability.

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references

Torrance R, James D. The state-of-the-Art in IC reverse engineering[C]//Cryptographic Hardware and Embedded Systems-CHES9. Berlin Heidelberg, Springer, 2009.

Briais S, Caron S, Cioranesco J M, et al. 3Dhardware canaries[C]//Cryptographic Hardware and Embedded Systems–CHES 2012. Berlin Heidelberg, Springer, 2012: 1-22.

Cioranesco J M, Danger J L, Graba T, et al. Cryptographically secure shields[C]//2014IEEE International Symposium on Hardware-Oriented Security and Trust(HOST). Arlington, VA, USA: IEEE Computer Society, 2014: 25-31.

Briais, S, Cioranesco, J. -M, Danger, J. -L, et al. Random Active Shield[C]//Fault Diagnosis and Tolerance in Cryptography(FDTC), 2012 Workshop on. Leuven, Belgium: IEEE, 2012: 103-113.

Shahrjerdi D, Rajendran J, Garg S, et al. Shielding and securing integrated circuits with sensors[C]//Computer-Aided Design(ICCAD), 2014IEEE/ACM International Conference on. San Jose, CA, USA: IEEE, 2014: 170-174.

冉彤, 白国强. 基于系统级封装(SiP)的信息安全芯片集成设计[J]. 微电子学与计算机, 2012, 29(1): 10-14. DOI: 10

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