The classic architecture of antifuse-based FPGAs was described. Then the details about programmable logic module (PLM)
placement and routing
programmable interconnection of antifuse-based FPGAs was presented. According to the test patterns of antifuse-based FPGA
a method for antifuse-based FPGA test
which combined ATE and mounting plate
was proposed. The results of the test experiments showed that the employed method can achieve successful test and confirmation of unprogrammed device at the factory.
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references
Inoue T, Miyazaki S, fujiwara H, et al. Universal fault diagnosis for lookup table FPGA[J]. IEEE Design Test Comput, 1998, 15(1-3): 39-44. DOI: 39
Huang W k, Meyer F J, Chen X-T, et al. Testing configurable LUT - based FPGAs[J]. IEEE Trans VLSI Syst, 1998, 6(7): 276-283. DOI: 276