For the limited resources of the embedded multi-core processor
a task scheduling method based on software pipelining was proposed. The workload
communication overhead and storage resource of this method are modeled as an integer linear programming formulation
and by implementing load balance
reducing inter-core communication and optimizing the usage of storage on-chip to improve application performance. This method is experimented on the Revealer processor
and results show that this method improves program performance compared with other task scheduling method
and can be better adapted to the embedded multicore processor.
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references
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