Instructions Dependence Dispose Method in General Purpose Digital Signal Processor Based on ARM Instruction Set Architecture

WANG Xu; FU Jia-wei; HE Hu

Chinese

您当前的位置：

首页 >

文章列表页 >

Instructions Dependence Dispose Method in General Purpose Digital Signal Processor Based on ARM Instruction Set Architecture

更新时间：2026-09-04

- Instructions Dependence Dispose Method in General Purpose Digital Signal Processor Based on ARM Instruction Set Architecture
- Vol. 33, Issue 9, Pages: 10-14(2016)
- 作者机构：
  
  清华大学微电子学研究所,北京,100084
- 作者简介：
- 基金信息：
- DOI：
  CLC：
- Published：2016
- 稿件说明：
移动端阅览
王旭, 付家为, 何虎. 基于ARM指令集的通用DSP中指令相关处理方法[J]. 微电子学与计算机, 2016, 33(9): 10-14.

WANG Xu, FU Jia-wei, HE Hu. Instructions Dependence Dispose Method in General Purpose Digital Signal Processor Based on ARM Instruction Set Architecture[J]. 2016, 33(9): 10-14.
王旭, 付家为, 何虎. 基于ARM指令集的通用DSP中指令相关处理方法[J]. 微电子学与计算机, 2016, 33(9): 10-14. DOI：

WANG Xu, FU Jia-wei, HE Hu. Instructions Dependence Dispose Method in General Purpose Digital Signal Processor Based on ARM Instruction Set Architecture[J]. 2016, 33(9): 10-14. DOI：

摘要

针对现有处理器中指令相关检测模块占用面积大、延时长和功耗高等问题

提出了一套用于通用数字信号处理器中指令相关的检测方法

并且提出了指令相关的解决办法.通过设定一组锁定标识

可以检测同一周期内多条指令能否同时发射

也可以检测不同流水级的各组指令之间的相关性

实现指令的动态调度.利用超长指令字(VLIW)与超标量融合的方式

在不增加硬件开销的前提下

解决指令相关的问题.经过基于GEM5的仿真平台进行验证

结合实例证明了该方法的可行性.

Abstract

In view of instructions dependence detection module with large area

long time delay and high power consumption features in existing processor

a new instructions dependence detection and dispose method for Digital Signal Processor (DSP) is proposed to solve the problem. The method could detect the dependence between instructions in the same cycle

and also instructions dependence in different pipelines by setting a set of locking signal. Dynamic scheduling is implemented in this way. Using the fused microarchitecture integrating both Very Long Instruction Word (VLIW) and superscalar could dispose the dependence without extra hardware. The feasibility of this method is proved by examples based on the GEM5 simulator system.

关键词

Keywords

references

Agarwal N, Dimopoulos N. DSPstone benchmark of CoDels automated clock gating platform[C] //IEEE Computer Society Sympostium on VLsi. IEEE Computer Society. Frace, Montpellier, 2007: 508-509.

Binkert N, Beckmann B, Black G, et al. The gem5 simulator[J]. ACM Sigarch Computer Architecture News, 2011, 39(2): 1-7. DOI: 1

Palermo G, Sam M, Silvan C, et al. Branch prediction techniques for low-power VLIW proccessors[C] //ACM Great Lakes Symposium on VIsi 2003. Washington, Dc, USA, 2003: 224-228.

Butko A, Garibotti R, Ost L, et al. Accuracy evaluation of GEM5 simulator system[C] // Reconfigurable Communicati-on-centric System-on-Chip (ReCoSoC), 2012 7th Internatio- nal Workshop on. UK: York, IEEE, 2012: 1-7.

Wolfe M, Banerjee U. Data dependence and its application to parallel processing[J]. International Journal of Parallel Programming, 1987, 16(2): 137-178. DOI: 137

Steven G, Christianson B, Collins R, et al. A superscalar architecture to exploit instruction level parallelism[J]. Microprocessors % Microsystems, 1997, 20(7): 391-400. DOI: 391

Kim D H. Addressing mode extension to the ARM/thumb architecture[J]. Advances in Electrical % Computer Engineering, 2014, 14(2): 85-88. DOI: 85

Bruckner H P, Wielage W, Blume H. Intuitive and interactive movement sonificatirn on a heterogeneous RISC/DSP platform[C]// The 18th Annual International Conference on Auditory Display. Atlanta, 2012: 75-82.

陈峰扬, 杜勇, 郭德源, 等. 一种VLIW-Superscalar混合微处理器结构[J]. 微电子学与计算机, 2013, 30(11): 1-5. DOI: 1

Views

下载量

CSCD

Alert me when the article has been cited

提交

Tools

Publicity Resources

Simulation on the DC characteristics of double heterojunction p-GaN HEMT with AlN/GaN hybrid buffer layer

A review of large model development: technological evolution from BERT to Deepseek

High gain stability high temperature operational amplifier based on reverse body bias

Research on assembly action recognition based on MSS-YOLO-MPHands fusion architecture

Steganography model guided by attention mechanism and improved dense convolution

Related Author

No data

Related Institution

No data

AI问答

Postal code：100079
Tel：（010）53879206 Email：tmw@bjxintong.com.cn
Technical support is provided by Beijing Founder electronics co., LTD 京ICP备09082226号-64 京公网安备11010602201714号
It is recommended to read the content of this site in Chrome&IE9+. Please switch to extreme mode in browser 360.
Cookies We use cookies to help provide and enhance our service and tailor content. By continuing, you agree to the use of cookies.

⁰