An UVM Based Mixed-signal Verification Environment

GENG Rui; WANG Xiao-li

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An UVM Based Mixed-signal Verification Environment

更新时间：2026-09-04

- An UVM Based Mixed-signal Verification Environment
- Vol. 33, Issue 9, Pages: 24-27(2016)
- 作者机构：
  
  1. 西安交通大学电子与信息工程学院,陕西,西安,710049
  2. 西安交通大学理学院,陕西,西安,710049
- 作者简介：
- 基金信息：
- DOI：
  CLC：
- Published：2016
- 稿件说明：
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耿睿, 王小力. 一种基于UVM的混合信号验证环境[J]. 微电子学与计算机, 2016, 33(9): 24-27, 31.

GENG Rui, WANG Xiao-li. An UVM Based Mixed-signal Verification Environment[J]. 2016, 33(9): 24-27.
耿睿, 王小力. 一种基于UVM的混合信号验证环境[J]. 微电子学与计算机, 2016, 33(9): 24-27, 31. DOI：

GENG Rui, WANG Xiao-li. An UVM Based Mixed-signal Verification Environment[J]. 2016, 33(9): 24-27. DOI：

摘要

面向一款MCU中的Radio模块子系统

介绍了一种混合信号的验证环境

利用UVM验证方法学的灵活便捷

将主要为数字电路服务的UVM验证平台扩展到混合信号验证方面

并引入模拟断言机制

完成验证组件.验证结果表明

UVM作为一种验证方法同样适用于混合信号的验证工作

并能有效发挥其优势; 同时

利用Verilog-AMS为模拟电路提供的多种建模方案加强了验证可靠性.

Abstract

This paper introduced a mixed-signal verification environment based on UVM

a flexible and convenient verification methodology which was usually used in digital verification task. The verification component is completed with integrating analog assertions. The verification result shows that UVM well meets the needs of mixed-signal verification and shows great performance. At the same time

multi selectable Verilog-AMS models can enhance reliability.

关键词

Keywords

references

Liang C, Zhong G, Huang S, et al. UVM-AMS based sub-system verification of wireless power receiver SoC[C]// Solid-State and Integrated Circuit Technology (ICSICT), 2014 12th IEEE International Conference on. China, Guilin, IEEE, 2014: 1-3.

Srikanth Vijayaraghavan, Meyyappan Ramanathan. SystemVerilog Assertions应用指南[M]. 陈俊杰, 译. 北京: 清华大学出版社, 2006.

Janick Bergeron. Writing testbench using system verilog[M]. Berlin: Synopsys, Inc, Springer, 2008.

Chang H, Kundert K. Verification of complex analog and RF IC designs[J]. Proceedings of the IEEE, 2007, 95(3): 622-639. DOI: 622

Accellera. Verilog-AMS language reference manual[M]. Napa, Accellera Systems Initiative Inc. 2014.

田劲, 王小力. 基于UVM验证方法学的AES模块级验证[J]. 微电子学与计算机, 2012, 29(8): 86-90. DOI: 86

杨华中, 汪蕙, 侯赣焕. 十亿晶体管级芯片系统集成所面临的挑战与机遇[J]. 半导体情报, 2001, 38(1): 2-4. DOI: 2

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