A Reconfigurable Array Structure for Logarithmic and Exponential Functions

LV Qing; JIANG Lin; DENG Jun-yong; LI Xue-ting

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A Reconfigurable Array Structure for Logarithmic and Exponential Functions

更新时间：2026-09-04

- A Reconfigurable Array Structure for Logarithmic and Exponential Functions
- Vol. 33, Issue 10, Pages: 28-31(2016)
- 作者机构：
  
  西安邮电大学机构电子工程学院,陕西,西安,710121
- 作者简介：
- 基金信息：
- DOI：
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- Published：2016
- 稿件说明：
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吕青, 蒋林, 邓军勇, 李雪婷. 面向对数与指数函数的可重构阵列结构[J]. 微电子学与计算机, 2016, 33(10): 28-31, 35.

LV Qing, JIANG Lin, DENG Jun-yong, et al. A Reconfigurable Array Structure for Logarithmic and Exponential Functions[J]. 2016, 33(10): 28-31.
吕青, 蒋林, 邓军勇, 李雪婷. 面向对数与指数函数的可重构阵列结构[J]. 微电子学与计算机, 2016, 33(10): 28-31, 35. DOI：

LV Qing, JIANG Lin, DENG Jun-yong, et al. A Reconfigurable Array Structure for Logarithmic and Exponential Functions[J]. 2016, 33(10): 28-31. DOI：

摘要

对数与指数函数等超越函数应用广泛

但传统实现需要针对每一类函数开发专用硬件

周期长、成本高、灵活性差

为了适应体系结构向自主运算发展的趋势

提高超越函数处理的灵活性

本文面向对数和指数两种函数提出了一种可重构阵列结构.通过将两种函数处理算法向阵列结构中的对应处理元PE(Processing Element)进行映射完成重构.仿真结果表明

可重构计算技术兼顾了计算的灵活性与高效性

与专用硬件实现性能相当

最高频率可以达到210.117 MHz.

Abstract

The logarithmic and exponential functions are widely used

but the traditional implementation needs to be developed for each class of functions

which can lead to a long cycle

high cost and poor flexibility. In order to adapt to the development trend of the system structure

improve the flexibility of the transcendental function

this paper presents a reconfigurable array structure with two functions. The logarithmic and exponential functions are realized by programming

and then the reconfiguration is performed by configuring the processing element PE of the array structure. Based on the simulation results

reconfigurable computing technology takes into account the flexibility and efficiency

and it has the same performance with the application specific circuit

the maximum frequency up to 210 MHz.

关键词

Keywords

references

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Goldstein S C, Schmit H PipeRench. A reconfigurable architecture and compiler[C]// Proceedings of IEEE International Symposium on Circuits and Systems. New York, 2000: 70-77.

Sidahoao N, Constantinides G A, Cheung P Y. Architectures for function evaluation on FPGAs[C]// Proceedings of IEEE International Symposium on Circuits and Systems. London, 2003: 804-807.

张朝杰, 金小军. 基于CORDIC算法的微小卫星接收机设计及实现[J]. 浙江大学学报: 工学版, 2008, 42(6): 960-964. DOI: 960

Hartej Singh, Guangming Lu. MrophoSys: An integrated reconfigurable system for date-parallel and computation intensive appilcations[C]// Proceedings of IEEE International Symposium on Circuits and Systems. New York, 2000: 465-481.

沈绪榜, 刘泽响, 王茹. 计算机体系结构的统一模型[J]. 计算机学报, 2007, 29(5): 729-736. DOI: 729

牟胜梅, 李兆刚. 一种面向FPGA的指/对数函数求值算法[J]. 计算机工程与应用, 2011, 33(4): 59-61. DOI: 59

肖钰, 刘雷波. 应用于视频处理器的可重构流水处理器的设计与实现[J]. 电视技术, 2008, 32(6): 18-20. DOI: 18

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