this paper makes a deep research on logic analysis
inherent relationship of the decoder. It was implemented a new method of the logical optimal design of an 8B/10B decode having error checking. And the simulation results show that it can reduce the area of the circuit
improve the efficiency of encode and work well when check error.
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references
Widmer A X, Franaszek P A. A DC-balance, partitioned-block, 8B/10B transmission code[J]. IBM Journal of research and development, 1983, 23(5): 441. DOI: 441
Chen H Y, Lin C H, Jou S J. Low-jitter transmission code for 4-PAM signaling in serial links[J]. IEEE Asia-Pacific Conference on Advanced System Integrated Circuits, 2004, 8(4): 334-337. DOI: 334