Analysis of Through Silicon Via Resistance-Open Fault Model

SHANG Yu-ling; DOU Xin-xin; LI Chun-quan

Chinese

您当前的位置：

首页 >

文章列表页 >

Analysis of Through Silicon Via Resistance-Open Fault Model

更新时间：2026-09-04

- Analysis of Through Silicon Via Resistance-Open Fault Model
- Vol. 34, Issue 5, Pages: 49-53(2017)
- 作者机构：
  
  1. 桂林电子科技大学电子工程与自动化学院,广西,桂林,541004
  2. 桂林电子科技大学机构机电工程学院,广西,桂林,541004
- 作者简介：
- 基金信息：
- DOI：
  CLC：
- Published：2017
- 稿件说明：
移动端阅览
尚玉玲, 豆鑫鑫, 李春泉. 硅通孔电阻开路故障模型研究[J]. 微电子学与计算机, 2017, 34(5): 49-53.

SHANG Yu-ling, DOU Xin-xin, LI Chun-quan. Analysis of Through Silicon Via Resistance-Open Fault Model[J]. 2017, 34(5): 49-53.
尚玉玲, 豆鑫鑫, 李春泉. 硅通孔电阻开路故障模型研究[J]. 微电子学与计算机, 2017, 34(5): 49-53. DOI：

SHANG Yu-ling, DOU Xin-xin, LI Chun-quan. Analysis of Through Silicon Via Resistance-Open Fault Model[J]. 2017, 34(5): 49-53. DOI：

摘要

硅通孔(Through Silicon Via)技术是三维集成电路发展的关键技术

因此对于TSV的缺陷故障检测具有十分重要的意义.讨论了TSV的物理模型和延时模型

同时在先进设计系统(ADS)中建立了TSV的电阻开路故障的等效电路模型

提取了RLC参数.然后通过给等效电路模型施加信号源

将开路故障的输出延时与无故障时的输出进行对比

对不同程度故障的TSV的传输延时进行分析

并用最小二乘法拟合出利用延时来判断故障的大小的曲线.

Abstract

Through Silicon Via technology is a key technology for the development of three-dimensional integrated circuits

so it is very important to detect the defects in TSVs. In this paper

we discussed the physical model and delay model of the TSV

a resistance-open fault equivalent circuit model is also established in the Advanced simulation system(ADS) and extracted RLC parameters of the TSV. Then through applying signal source to the equivalent circuit model

we compare the output of the fault TSV with fault-free TSV and analyze the propagation delay of different degree of the fault TSV. We draw a curve judging the size of the crack with the method of the least squares.

关键词

Keywords

references

You J W, Huang S Y. In-Situ method for TSV delay testing and characterization using input sensitivity analysis[J]. IEEE Transcations on Very Large Scale Integration (VLSI) Systems, 2013, 3(21): 445-446. DOI: 445

Guruprasad Katti, Michele Stucchi, Kristin De Meyer, et al. Electrical modeling and characterization of through silicon via for three-dimensional ICs[J]. IEEE Transcations Electron Devices, 2010, 1(57): 2-7. DOI: 2

王凤娟. 基于硅通孔(TSV)的三维集成电路(3D IC)关键特性分析[D]. 西安: 西安电子科技大学, 2014: 20-26.

Huang Shi Yu, Lin Yu Hsiang, Tsai Kun Han (Hans), et al. Small delay testing for TSVs in 3-D ICs[C]//Processing of Design Automation Conference (DAC). San Francisco, 2012: 1031-1034.

Kandalaft N, Rashidzadeh R, Ahmadi M. Testing 3D IC through-silicon-vias (TSVs) by direct probing[J]. IEEE Transcations Computer-Aided Design of Integrated Circuits and Systems, 2013, 4(32): 538-544. DOI: 538

蒋礼, 伍晓霞, 潘毅, 等, 基于裂纹扩展的无铅焊点阻抗等效模型[J]. 电子元件与材料, 2011, 30(12): 54-57. DOI: 54

Views

下载量

CSCD

Alert me when the article has been cited

提交

Tools

Publicity Resources

Monte carlo analysis of V-layout trench SiC neutron detector

Research on the design of blockchain-based AI-generated content traceability framework

A high-efficiency charge pump for ultra-low voltage boost systems

High gain stability high temperature operational amplifier based on reverse body bias

A review of large model development: technological evolution from BERT to Deepseek

Related Author

No data

Related Institution

No data

AI问答

Postal code：100079
Tel：（010）53879206 Email：tmw@bjxintong.com.cn
Technical support is provided by Beijing Founder electronics co., LTD 京ICP备09082226号-64 京公网安备11010602201714号
It is recommended to read the content of this site in Chrome&IE9+. Please switch to extreme mode in browser 360.
Cookies We use cookies to help provide and enhance our service and tailor content. By continuing, you agree to the use of cookies.

⁰