Design of a Fast Transient Response and Capacitor-Free LDO Regulator

CHEN Zhong-xue; TANG Jie; ZHANG Guo-hao

Chinese

您当前的位置：

首页 >

文章列表页 >

Design of a Fast Transient Response and Capacitor-Free LDO Regulator

更新时间：2026-09-04

- Design of a Fast Transient Response and Capacitor-Free LDO Regulator
- Vol. 33, Issue 12, Pages: 85-88(2016)
- 作者机构：
  
  广东工业大学机构信息工程学院,广东,广州,510006
- 作者简介：
- 基金信息：
- DOI：
  CLC：
- Published：2016
- 稿件说明：
移动端阅览
陈忠学, 唐杰, 章国豪. 一种快速瞬态响应的无片外电容LDO稳压器设计[J]. 微电子学与计算机, 2016, 33(12): 85-88, 92.

CHEN Zhong-xue, TANG Jie, ZHANG Guo-hao. Design of a Fast Transient Response and Capacitor-Free LDO Regulator[J]. 2016, 33(12): 85-88.
陈忠学, 唐杰, 章国豪. 一种快速瞬态响应的无片外电容LDO稳压器设计[J]. 微电子学与计算机, 2016, 33(12): 85-88, 92. DOI：

CHEN Zhong-xue, TANG Jie, ZHANG Guo-hao. Design of a Fast Transient Response and Capacitor-Free LDO Regulator[J]. 2016, 33(12): 85-88. DOI：

摘要

基于LDO稳压器的工作原理

设计了一种快速瞬态响应的无片外电容LDO稳压器电路.LDO稳压器主要包括无运放带隙基准源、误差放大器、瞬态响应增强模块、功率调整管及NMOS管反馈网络.提出一种新结构的瞬态响应增强电路

加快功率调整管栅极的充放电速度

实现了快速瞬态响应.电路采用TSMC 0.18 m标准CMOS工艺实现

版图尺寸为190 m×210 m

后仿真结果表明: 在输入电压为3.3 V时

输出电压为2.15 V

轻载与满载之间跳变的建立时间最大为0.6 s

低频时PSRR为-63 dB

压差为50 mV.

Abstract

Based on the working principle of LDO regulator

a fast transient response and capacitor-free LDO regulator was designed. LDO regulator includes bandgap reference without amplifier、EA、transient response enhancement module、power regulator and NMOS transistor feedback network. A new structure of the transient response enhancement circuit is proposed to speed up the power adjustment transistor gate charge and discharge

and realize the fast transient response. The circuit is fabricated with TSMC 0.18m CMOS process and has the layout size of 190 m×210 m. The simulation results show that when the input voltage is 3.3 V

the output voltage is 2.15 V. Between light load and full load establishment of the maximum time for the 0.6 s. PSRR is -63 dB at low frequency

voltage difference is 50 mV.

关键词

Keywords

references

毕查德. 拉扎维. 模拟CMOS集成电路设计[M]. 西安: 西安交通大学出版社, 2002.

Suresh A, Sreehari R P, Debasish D. Fully on chip area efficient LDO voltage regulator[C]// IEEE Conference Publications. India: IEEE, 2014: 1-5.

吕春燕. 无片外电容的低压差线性稳压器设计[D]. 长春: 吉林大学, 2015: 28-31.

谭林. 具有快速负载瞬态响应LDO设计[D]. 成都: 电子科技大学, 2013: 27-53.

Leo C J, Raja M K, Je Minkyu. A ultra low-power capacitor-less LDO with high PSR[C]// 2013 IEEE MTT-S International Microwave Workshop Series on RF and Wireless Technologies for Biomedical and Healthcare Applications. Singapore: IEEE, 2013: 1-3.

Zared K, Qjidaa H, Zouak M. Full on-chip CMOS low dropout voltage regulator using MOS capacitor compensation[J]. Multimedia Computing and Systems (ICMCS), 2012, 22(1): 103-112. DOI: 103

王帅. 无片外电容CMOS低压差稳压器的设计[D]. 长春: 吉林大学, 2006: 14-16

杨洁, 曾云. 一种快速瞬态响应的无片外电容LDO的设计[J]. 微电子学与计算机, 2012, 29(8) : 123-126. DOI: 123

胡玉松, 冯全源. 一种高增益快速响应且无片外电容型LDO设计[J]. 电子器件, 2015, 38(2) : 259-263. DOI: 259

王常, 吴震, 邓朝勇. 一种无片外电容LDO的瞬态增强电路设计[J]. 电子设计工程, 2013: 21(4): 14-18. DOI: 14

Views

下载量

CSCD

Alert me when the article has been cited

提交

Tools

Publicity Resources

Aerial vehicle detection algorithm based on multi-scale fusion and small-object enhancement

Design of ultra-low power real-time clock circuits

Monte carlo analysis of V-layout trench SiC neutron detector

High gain stability high temperature operational amplifier based on reverse body bias

A review of large model development: technological evolution from BERT to Deepseek

Related Author

No data

Related Institution

No data

AI问答

Postal code：100079
Tel：（010）53879206 Email：tmw@bjxintong.com.cn
Technical support is provided by Beijing Founder electronics co., LTD 京ICP备09082226号-64 京公网安备11010602201714号
It is recommended to read the content of this site in Chrome&IE9+. Please switch to extreme mode in browser 360.
Cookies We use cookies to help provide and enhance our service and tailor content. By continuing, you agree to the use of cookies.

⁰