The floorplanning plays a vital role to the final VLSI performance because it is in the earlier stage of the physical design. In this paper
we introduce several kinds of constraints in floorplanning. We investigate the influence caused by constraint in floorplanning. The experimental results on IBM-HB+ Benchmark Suites show that the constraint embedding had some influence on the floorplanning design
sometimes it may improve the quality of the design.
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references
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