we customized the FPGA chip to fit the SAT problem
e.g.
translating and compiling the large scale system
and then seccessfully solved the problem by FPGA autonomously.
关键词
Keywords
references
P Zhong, M Martonosi, P Ashar, et al. Using configurable computing to accelerate boolean satisfiablitiy[J]. IEEE trans Computer-Aided Design of Integrated Circuits and Systems, 1999, 18(6): 861-868. DOI: 861
N A Reis, J T de Sousa. On implementing a configware/software SAT solver[C]//Proc 10th IEEE Int'l Sympl Field-programmable Custom Computing Machines. Napa, California: IEEE, 2002: 282-283.
J T D. Sousa, J P Marques-Silva, M Abramovici. A configware/software approach to SAT solving[C]//Proc Ninth IEEE Int'Symp Field-Programmable Custom Computing Machines. Californla: IEEE, 2001: 239-298.