Power Management Design for Low Power SoC

HUANG Ze-lin; QIAO Shu-shan; YUAN Jia

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Power Management Design for Low Power SoC

更新时间：2026-09-04

- Power Management Design for Low Power SoC
- Vol. 34, Issue 10, Pages: 1-4(2017)
- 作者机构：
  
  1. 中国科学院机构微电子研究所,北京,100029
  2. 中国科学院大学机构,北京,100049
- 作者简介：
- 基金信息：
- DOI：
  CLC：
- Published：2017
- 稿件说明：
移动端阅览
黄泽林, 乔树山, 袁甲. 物联网节点SoC的功耗管理器设计[J]. 微电子学与计算机, 2017, 34(10): 1-4, 10.

HUANG Ze-lin, QIAO Shu-shan, YUAN Jia. Power Management Design for Low Power SoC[J]. 2017, 34(10): 1-4.
黄泽林, 乔树山, 袁甲. 物联网节点SoC的功耗管理器设计[J]. 微电子学与计算机, 2017, 34(10): 1-4, 10. DOI：

HUANG Ze-lin, QIAO Shu-shan, YUAN Jia. Power Management Design for Low Power SoC[J]. 2017, 34(10): 1-4. DOI：

摘要

物联网对传感节点SoC的功耗要求很高

很多应用场景不需要芯片所有模块都一直处于工作状态

甚至大部分时间内只有极个别模块需要工作.基于这个特点

本文提出了一种功耗管理器的设计

通过时钟管理和电源管理实现了多工作模式

以最精简的逻辑应对多种工作场景.功耗管理器支持工作模式、睡眠模式和深度睡眠模式

用SMIC 130 nm综合

1.08 V电压下工作频率为32 kHz时

电流仅为0.47 A.

Abstract

The requirement of IoT sensor node SoC is strict. In most application scenario

there is no need that all the modules keep working all the time. Only a few modules need to work instead. We propose the idea of power management

realizing multi-work mode with clock management and power management

as well as using the least number of modules to work. Power management is able to support work mode

sleep mode and deep-sleep mode

the current is only 0.47 A at the voltage of 1.08 V and the frequency of 32 kHz

fabricated with SMIC 130 nm.

关键词

Keywords

references

New York, USA Keating M, Flynn D, Aitken R, et al. Low power methodology manual for system-on-chip design[M]. New York, USA: Springer, 2007: 33-40. DOI: 33

Moorandi D, Sicari S, Pellegrini F D, et al. Internet of things: vision, applications and research challenges[J]. Ad Hoc Networks, 2012, 10(9): 1497-1516. DOI: 1497

Piguet C, Renaudin M, Omnes J T, et al. Special session on low-power systems on chips (SoCs)[C]//Design, Automation and Test in Europe. Conference and Exhibition. Munich, Germany, 2001: 488-494.

Conti F, Palossi D, Marongiu A, et al. Enabling the heterogeneous accelerator model on ultra-low power microcontroller platforms[C]//2016 Design, Automation % Test in Europe Conference and Exhibition. Dresdon, Germany, 2016: 1201-1206.

王祚栋, 魏少军. SOC时代低功耗设计的研究与进展[J]. 微电子学, 2005, 35(2): 174-179. DOI: 174

Gubbi I, Buyya R, Marusic S, et al. Internet of Things (loT): a vision, architectural elements, and future directions[J]. Future Generation Computer Systems, 2013, 29(9): 1645-1660. DOI: 1645

Singhal V K, Menezes V, Chakravarthy S, et al. A 10.5 uA/MHz at 16 MHz single-cycle non-volatile memory access microcontroller with full state retention at 108na in a 90nm process[C]//International of Solid-State Circuit Conference. San Francisco, CA, USA, 2015: 1-3.

Piguet C, Renaudin M, Omnes J T, et al. Special session on low-power systems on chips (SoCs)[C]//Design, Automation and Test in Europe. Conference and Exhibition. Germany, Munich, 2001: 488-494.

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