LIU Xin-tong, LI Zhen-rong, ZHUANG Yi-qi. A 0-100 MHz High-Linearity Low-Power Clock Generator Based on CMOS Ring Oscillator[J]. 2018, 35(3): 52-57.DOI:
A 0-100 MHz High-Linearity Low-Power Clock Generator Based on CMOS Ring Oscillator
A ring oscillator is designed based on a high-linearity and low-power delay element and V-I converter circuits. A programmable-delay phase frequency detector and a programmable-current charge pump are proposed based on digital control technology for achieving excellent loop performance. The high-linearity and low-power clock generator is implemented in 0.18μm RF CMOS technology.
Kadaba R Lakshmikumar. Analog PLL design with ring oscillators at low-gigahertz frequencies in nanometer CMOS: Challenges and solutions[J]. IEEE Trans on Circuits and Systems, 2009, 56(5): 389-393. DOI: 389
Goyal B, Suman S, Ghosh P K. Design and analysis of improved performance ring VCO based on differential pair configuration[C]//Electrical, Electronics, and Optimization Techniques (ICEEOT), International Conference on. IEEE, 2016: 3468-3472.
Asad A Abidi. Phase noise and jitter in CMOS ring oscillators[J]. IEEE Journal of Solid-State Circuits. 2006, 41(8): 1803-1816. DOI: 1803
Amr Amin Hafez, Chih-Kong Ken Yang. Design and optimization of multipath ring oscillators[J]. IEEE Trans on Circuits and Systems, 2011, 58(10): 2332-2345. DOI: 2332
Yang W B, Wang C H, Chuo I T. A Robust Oscillator for Embedded System without External Crystal[J]. Applied Mathematics % Information Sciences 9 (1L), 2015: 73-80. DOI: 73
Adrian Maxim, Ramin K Poorfard, Richard A Johnson, et al. A fully integrated 0.13 μm CMOS digital low-IF DBS satellite tuner using a ring oscillator-based frequency synthesizer[J]. IEEE Journal of Solid-State Circuits. 2007, 42(5): 967-982. DOI: 967
Yan Yunfeng, Yan Taotao, Mo Tingting, et al. A 62MHz ~316MHz phase-locked loop based on ring oscillator for ADC clock generator in 0.18 μm CMOS[C]//Third International Conference on Measuring Technology and Mechatronics Automation. Shangshai: IEEE, 2011: 6-8.
Huang Jiwei, Tao Liang, Li Zhengpin. A low-jitter and low-power clock generator[C]//IEEE International Conference on Solid-State and Integrated Circuit Technology. Shanghai: IEEE, 2010: 385-387.
Chen Zuow-Zun, Lee Tai-Cheng. The design and analysis of dual-delay-path ring oscillators[J]. IEEE Trans on Circuits and Systems, 2011, 58(3): 470-478. DOI: 470