A Configurable Test Circuit of Propagation Delay for Antifuse FPGA

DU Tao; LI Wei; CHAO Xing; WU Fang-min; WU Hua-gang; LIU Dan

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A Configurable Test Circuit of Propagation Delay for Antifuse FPGA

更新时间：2026-09-04

- A Configurable Test Circuit of Propagation Delay for Antifuse FPGA
- Vol. 35, Issue 2, Pages: 84-88(2018)
- 作者机构：
  
  电子科技大学电子薄膜与集成器件国家重点实验室机构,四川,成都,610054
- 作者简介：
- 基金信息：
- DOI：
  CLC：
- Published：2018
- 稿件说明：
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杜涛, 李威, 晁醒, 吴方明, 吴华刚, 刘丹. 一种反熔丝FPGA的可配置传输延迟测试电路[J]. 微电子学与计算机, 2018, 35(2): 84-88, 93.

DU Tao, LI Wei, CHAO Xing, et al. A Configurable Test Circuit of Propagation Delay for Antifuse FPGA[J]. 2018, 35(2): 84-88.
杜涛, 李威, 晁醒, 吴方明, 吴华刚, 刘丹. 一种反熔丝FPGA的可配置传输延迟测试电路[J]. 微电子学与计算机, 2018, 35(2): 84-88, 93. DOI：

DU Tao, LI Wei, CHAO Xing, et al. A Configurable Test Circuit of Propagation Delay for Antifuse FPGA[J]. 2018, 35(2): 84-88. DOI：

摘要

为了对反熔丝FPGA进行性能评估及芯片速度等级的定级划分

提出了采用传输延迟参数测试法进行分析.针对反熔丝FPGA一次可编程及应用需求多样性的特点

设计了一种包含完整传输延迟影响因素的专用测试电路

该电路能对测试链路级数、布线长度、散出数等多方面进行差异化配置

从而形成了具有实用性和通用性的反熔丝FPGA性能评估解决方案.通过电路仿真及1.0 μm CMOS ONO反熔丝工艺硅验证实测表明

该传输延迟测试电路能实际应用于反熔丝FPGA的产品开发.

Abstract

In order to evaluate the performance of the antifuse FPGA and classify the chip speed level

a test method of propagation delay is proposed. Aimed at the characteristics of one time programmable and diverse application requirements for the antifuse FPGA

a novel test circuit is designed

which includes the influencing factors of the propagation delay. The circuit exhibits a variety of configurable capacity

including the test link configuration

the routing length configuration

the fanout value configuration

etc. The performance evaluation solution for the antifuse FPGA is practical and feasible. The results of the circuit simulation and the silicon verification based on the 1.0um CMOS ONO antifuse process show that the test circuit of propagation delay is suitable for the application of antifuse FPGA development.

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references

Lippe K, Kerkhoff H, Kloppers G, et al. A programmable-load CMOS ring oscillator/inverter chain for propagation-delay measurements[C]// International Conference on Microelectronic Test Structures. California, IEEE, 1989: 225-226.

顾梦霞. 数字通道传输延迟时间测量方法研究[J]. 计算机工程与科学, 2015, 37(10): 1825-1830. DOI: 1825

朱明程, 熊元姣. ACTEL数字系统现场集成技术[M]. 北京: 清华大学出版社, 2004.

Blaes B R, Buehler M G. Inverter propagation delay measurements using timing sampler circuits[C]// International Conference on Microelectronic Test Structures. IEEE Xplore, California, 1989: 227-232.

Wang X J, Kwasniewski T. Propagation Delay-Based Expression of Power Supply-Induced Jitter Sensitivity for CMOS Buffer Chain[J]. IEEE Transactions on Electromagnetic Compatibility, 2016, 58(2): 627-630. DOI: 627

赵冬青, 任勇峰. 高速数字采集系统通道间信号传输延迟时间分析[J]. 测试技术学报, 2011, 25(2): 178-182. DOI: 178

潘兴境. 集成电路平均传输延迟时间的两种测试方法[J]. 化工自动化及仪表, 1979, 14(4): 77-83. DOI: 77

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