Graphics pipeline is a common model of GPU (Graphics Processing Unit)work. primitive assembler is one of the key stage in the graphics pipeline

in order to improve the efficiency and quality of rendering by the graphics pipeline

quickly and accurately generate primitives as one of the main factors. This paper meets the requirements of the current graphics pipeline

this paper uses SystemC language to build the behavior model of primitive assembler. And uses Verilog language to perform hardware design of primitive assembler unit. And further more

this paper uses SystemVerilog language to build the nierarchical verifivation environment which facilities the design modules. Through all aspects of verification

this paper shows that the design of the primitive assembler unit metaphor to meet the system design requirements.