The Implementation of Universal Verification Platform for Sub-model of DBF System Based on UVM

DENG Qing-yong; ZHU Peng; XI Jian-bo

Chinese

您当前的位置：

首页 >

文章列表页 >

The Implementation of Universal Verification Platform for Sub-model of DBF System Based on UVM

更新时间：2026-09-04

- The Implementation of Universal Verification Platform for Sub-model of DBF System Based on UVM
- Vol. 35, Issue 1, Pages: 115-117(2018)
- 作者机构：
  
  1. 中国电子科技集团第三十八研究所数字技术中心,安徽,合肥,230088
  2. 中国电子科技集团第三十八研究所孔径阵列与空间探测安徽省重点实验室,安徽,合肥,230088
- 作者简介：
- 基金信息：
- DOI：
  CLC：
- Published：2018
- 稿件说明：
移动端阅览
邓庆勇, 朱鹏, 习建博. 基于UVM的DBF系统模块级可重用验证平台的实现[J]. 微电子学与计算机, 2018, 35(1): 115-117, 123.

DENG Qing-yong, ZHU Peng, XI Jian-bo. The Implementation of Universal Verification Platform for Sub-model of DBF System Based on UVM[J]. 2018, 35(1): 115-117.
邓庆勇, 朱鹏, 习建博. 基于UVM的DBF系统模块级可重用验证平台的实现[J]. 微电子学与计算机, 2018, 35(1): 115-117, 123. DOI：

DENG Qing-yong, ZHU Peng, XI Jian-bo. The Implementation of Universal Verification Platform for Sub-model of DBF System Based on UVM[J]. 2018, 35(1): 115-117. DOI：

摘要

针对雷达系统中FPGA验证系统搭工作量大

验证覆盖率低等现存问题

基于FPGA+DSP结构中FPGA模块结构的特点

采用UVM (通用验证方法学) 搭建通用模块的验证平台

大大提高验证平台重用性、验证覆盖率和验证效率.最后

以多路复用分数延迟滤波器模块为例

编写测试激励和参考模型

实现对多路复用分数延迟滤波器的快速验证.

Abstract

In the radar system

DBF (digital beam forming) system usually adopts FPGA+DSP

Aimed at the FPGA in DBF system

based on UVM (Universal Verification Methodology)

we established a Universal Verification Platform for DBF FPGA model

to enhance the verification platform reusability and verification coverage ratio

the verification platform can improve verification efficiency.Finally

based on the universal verification platform

by means of add test stimulations and reference model to verify an fractional delay filter model in DBF system.

关键词

Keywords

references

张强, UVM实战卷1.2014[M]. 北京: 机械工业出版社, 2014.

成超, 李会勇, 何子述. 基于子阵时延的数字阵列宽带波束形成[J]. 雷达科学与技术, 2008, 6(6), 459-462. DOI: 459

宋何娟, 马强. 应用于数字阵列雷达的数字波束形成(DBF) 的设计与实现[J]. 中国集成电路, 2010, 205(4): 42-45. DOI: 42

彭宏涛, 朱德智. 基于Farrow滤波器的宽带数字波束形成技术研究及实现[J]. 舰船电子对抗, 2015, 38(2): 37-41. DOI: 37

Views

下载量

CSCD

Alert me when the article has been cited

提交

Tools

Publicity Resources

An high hierarchical verification platform Based on UVM

An UVM Based Mixed-signal Verification Environment

Research of Vertical Reuse Based on UVM

Monte carlo analysis of V-layout trench SiC neutron detector

Implementation and verification of a dual-chain power gating strategy for low power design

Related Author

LI Chen-yang

SONG Shu-shen

WANG Tao

HUANG Chu-chao

GENG Rui

WANG Xiao-li

XIONG Tao

JIANG Jian-hua

Related Institution

Southwest China Institute of Electronic Technology

School of Computer Science and Technology,Dalian University of Technology

College of Engineering, University of Missouri

School of Electronics and Information Engineering, Xi'an Jiaotong University

School of Science, Xi'an Jiaotong University

AI问答

Postal code：100079
Tel：（010）53879206 Email：tmw@bjxintong.com.cn
Technical support is provided by Beijing Founder electronics co., LTD 京ICP备09082226号-64 京公网安备11010602201714号
It is recommended to read the content of this site in Chrome&IE9+. Please switch to extreme mode in browser 360.
Cookies We use cookies to help provide and enhance our service and tailor content. By continuing, you agree to the use of cookies.

⁰