An Optimized Image Scaling Based on Superposition and Its FPGA Implemention

WU Wen-bin; GAO Jun-xiong; WANG Yun-bo

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An Optimized Image Scaling Based on Superposition and Its FPGA Implemention

更新时间：2026-09-04

- An Optimized Image Scaling Based on Superposition and Its FPGA Implemention
- Vol. 34, Issue 11, Pages: 128-130(2017)
- 作者机构：
  
  华中科技大学微电子学与固体电子学系,湖北,武汉,430074
- 作者简介：
- 基金信息：
- DOI：
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- Published：2017
- 稿件说明：
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武文斌, 高俊雄, 王耘波. 基于叠加的图像缩放优化及FPGA实现[J]. 微电子学与计算机, 2017, 34(11): 128-130.

WU Wen-bin, GAO Jun-xiong, WANG Yun-bo. An Optimized Image Scaling Based on Superposition and Its FPGA Implemention[J]. 2017, 34(11): 128-130.
武文斌, 高俊雄, 王耘波. 基于叠加的图像缩放优化及FPGA实现[J]. 微电子学与计算机, 2017, 34(11): 128-130. DOI：

WU Wen-bin, GAO Jun-xiong, WANG Yun-bo. An Optimized Image Scaling Based on Superposition and Its FPGA Implemention[J]. 2017, 34(11): 128-130. DOI：

摘要

针对数字图像缩放处理消耗较多硬件资源的问题

利用坐标转换和叠加处理的方法

进行图像缩放的硬件设计

采用流水线设计

转换为两种整数倍缩放图像叠加的形式

使其在FPGA上更加易于实现.最后在Xilinx的XC7A200T芯片上对算法进行验证

得到数据后用MATLAB显示缩放后图像

效果良好.

Abstract

Aiming at solving the problem of hardware resource consumpution in the feild of image scaling

the hardware design of the image scaling is carried out by using the method of coordinate transformation and superposition.Besides we can make it easy to implement on FPGA in the form of two interger times scaled images overlaying

with the pipeline architecture design.Finally the algorithm is verified on the Xilinx XC7A200T chip and the data is transfromed to images with MATLAB which confirms at can work well.

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references

张梁, 王景存, 梅镖. 视频缩放在FPGA中的应用和实现[J], 电子技术应用, 2016, 42(6): 34-37. DOI: 34

王平, 全吉成, 赵柏宇. 基于双线性插值的图像缩放在GPU上的实现[J]. 微电子学与计算机, 2016, 33(11): 129-132. DOI: 129

刘强, 晋兆虎. 基于FPGA的任意比例图像缩放算法[J]. 数字技术与应用, 2011, 29(12): 126-127. DOI: 126

丁家隆, 杜慧敏, 曹广界, 等. 基于最优移位双线性插值的图像缩放旋转硬件加速研究[J]. 微电子学与计算机, 2016, 33(7): 115-124. DOI: 115

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