Design Optimization of High Speed Interconnect on Silicon Interposer

MO Ning-ji; GUAN Ning; JIANG Jian-fei; WANG Qin

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Design Optimization of High Speed Interconnect on Silicon Interposer

更新时间：2026-09-04

- Design Optimization of High Speed Interconnect on Silicon Interposer
- Vol. 35, Issue 8, Pages: 21-25(2018)
- 作者机构：
  
  1. 上海交通大学电子信息与电气工程学院,上海,200240
  2. 上海航天电子通讯设备研究所,上海,201108
- 作者简介：
- 基金信息：
- DOI：
  CLC：
- Published：2018
- 稿件说明：
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莫宁基, 关宁, 蒋剑飞, 王琴. 硅中介层中高速互连的优化设计[J]. 微电子学与计算机, 2018, 35(8): 21-25.

MO Ning-ji, GUAN Ning, JIANG Jian-fei, et al. Design Optimization of High Speed Interconnect on Silicon Interposer[J]. 2018, 35(8): 21-25.
莫宁基, 关宁, 蒋剑飞, 王琴. 硅中介层中高速互连的优化设计[J]. 微电子学与计算机, 2018, 35(8): 21-25. DOI：

MO Ning-ji, GUAN Ning, JIANG Jian-fei, et al. Design Optimization of High Speed Interconnect on Silicon Interposer[J]. 2018, 35(8): 21-25. DOI：

摘要

基于硅中介层的新型集成方法可以实现高速光电互连

其中的互连设计面临信号完整性的挑战.为适应硅中介层中高速光电互连的需求

本文对高速差分互连线设计

提出采用交叉的设计方法来提高传输信噪比.基于电磁场仿真工具

对于差分互连线进行建模与仿真

仿真结果表明本文提出的采用交叉的差分互连线具有显著的串扰抑制作用.本文还对互连线的尺寸和交叉位置提出进一步的优化设计方法

进一步改进了互连性能.仿真结果表明

本文中提出的设计方法

可以用来改进硅中介层的高速互连线设计.

Abstract

Silicon interposer based integration methodology can achieve high-speed optoelectronic interconnection

but there are many signal integrity problems. In order to meet the demand of high-speed optoelectronic interconnection on silicon interposer

this paper proposes a twisting method to improve the signal-to-noise ratio. Base on the electromagnetic simulation tool

the high-speed differential interconnects are modeled and simulated. The simulation results show that the proposed twisted differential interconnect has significant performance improvement on crosstalk cancelling. This paper also proposes optimization methods for the differential wires by adjusting the size and twisting position

which can further improve the transmission performance. Base on the simulation results

the proposed method can be used to improve the design of high-speed interconnect of silicon interposer.

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references

Sham K J, Ahmadi M R, Gerry Talbot S B, et al. FEXT crosstalk cancellation for high-speed serial link design[C]//IEEE Custom Integrated Circuits Conference 2006. San Jose, CA, 2006: 405-408.

Yang Y. 3D silicon photonics packaging based on tsv interposer for high density on-board optics module[C]//2016 IEEE 66th Electronic Components and Technology Conference (ECTC). Las Vegas, NV, 2016: 483-489.

Gu X. High-density silicon carrier transmission line design for chip-to-chip interconnects[C]//2011 IEEE 20th Conference on Electrical Performance of Electronic Packaging and Systems. San Jose, CA, 2011: 27-30.

Dehlaghi B, Chan Carusone A. A 0.3 pJ/bit 20 Gb/s/wire parallel interface for die-to-die communication[J]. IEEE Journal of Solid-State Circuits, 2016, 51(11): 2690-2701. DOI: 2690

Yang H S, Zhang C, Zia M L, et al. Interposer-to-interposer electrical and silicon photonic interconnection platform using silicon bridge[C]//2014 Optical Interconnects Conference. San Diego, CA, 2014: 71-72.

Ramos H M G, Postolache O, Alegria F C, et al. Using the skin effect to estimate cracks depths in mettalic structures[C]//2009 IEEE Instrumentation and Measurement Technology Conference. Singapore, 2009: 1361-1366.

Jacobs L, Guenach M, Moeneclaey M. Application of MIMO DF equalization to high-speed off-chip communication[C]//IEEE EUROCON 2015 International Conference on Computer as a Tool (EUROCON). Salamanca, 2015: 1-4.

Jacobs L, Guenach M, Moeneclaey M. MIMO preequalization and DFE for high-speed off-chip communication[C]//2016 13th International Multi-Conference on Systems, Signals % Devices (SSD). Leipzig, 2016: 177-182.

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