Design of An Codec Scheme for Magnetic Isolation Drive Circuit

PENG Rui; CAI Xiao-wu; LIU Hai-nan; LUO Jia-jun; ZHAO Hai-tao; WU Xiu-long

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Design of An Codec Scheme for Magnetic Isolation Drive Circuit

更新时间：2026-09-04

- Design of An Codec Scheme for Magnetic Isolation Drive Circuit
- Vol. 35, Issue 9, Pages: 42-46(2018)
- 作者机构：
  
  1. 中国科学院机构微电子研究所,北京,100029
  2. 中国科学院硅器件技术重点实验室,北京,100029
  3. 安徽大学电子信息工程学院,合肥,230601
- 作者简介：
- 基金信息：
- DOI：
  CLC：
- Published：2018
- 稿件说明：
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彭锐, 蔡小五, 刘海南, 罗家俊, 赵海涛, 吴秀龙. 一种用于磁隔离驱动电路的编解码方案设计[J]. 微电子学与计算机, 2018, 35(9): 42-46.

PENG Rui, CAI Xiao-wu, LIU Hai-nan, et al. Design of An Codec Scheme for Magnetic Isolation Drive Circuit[J]. 2018, 35(9): 42-46.
彭锐, 蔡小五, 刘海南, 罗家俊, 赵海涛, 吴秀龙. 一种用于磁隔离驱动电路的编解码方案设计[J]. 微电子学与计算机, 2018, 35(9): 42-46. DOI：

PENG Rui, CAI Xiao-wu, LIU Hai-nan, et al. Design of An Codec Scheme for Magnetic Isolation Drive Circuit[J]. 2018, 35(9): 42-46. DOI：

摘要

采用体硅0.25 m BCD工艺

设计了一种用于磁隔离驱动电路的编解码方案

将需要传输的数字信号编码成两个不同宽度的高频脉冲

这些高频脉冲从变压器初级线圈耦合到次级线圈

并且由次级端电路检测

最后在输出端重新恢复成输入的信号.相对于传统的磁隔离驱动电路的编解码方案

本文设计的磁隔离驱动电路的编码和解码方式新颖

电路实现简单

使传输的信号延迟时间大大减小

并且工作频率更高.仿真结果表明

电路在3~5 V的电压下能正常工作

可以实现最大数据隔离传输速率达到125 Mbps

延迟时间最大仅有8 ns

静态电流1.64 mA

动态功耗0.37 mA/Mbps.

Abstract

Based on bulk silicon 0.25 m BCD process

a codec scheme for magnetic isolation drive circuit is designed. The digital signal to be transmitted is encoded into two high-frequency pulses with different widths. The primary winding of the transformer is coupled to the secondary winding and is detected by the secondary side circuit and finally restored to the input signal at the output. Compared with the codec scheme for traditional magnetic isolation drive circuit

the magnetic isolation drive circuit designed in this paper has a novel encoding and decoding method

and the circuit is simple to be realized. The delay time of the transmitted signal is greatly reduced and the frequency is higher. The simulation results show that the circuit can work normally under the voltage of 3~5 V

which can achieve the maximum data isolation transfer rate of 125Mbps.The maximum delay time is only 8ns

and the quiescent current is 1.64mA with the dynamic power of 0.37mA/Mbps.

关键词

Keywords

references

El Gharniti O, Kerherve E, Begueret J B. Modeling and characterization of on-chip transformers for silicon RFIC[J]. IEEE Transactions on Microwave Theory and Techniques, 2007, 55(4): 607-615. DOI: 607

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张风体.基于片上变压器的数字隔离器的分析与设计[D].成都: 电子科技大学, 2014.

Hermann T M, Black W C, Hui S. Magnetically coupled linear isolator[J]. IEEE Transactions on Magnetics, 1997, 33(5): 4029-4031. DOI: 4029

Chen B, Wynne J, Kliger R. High speed digital isolators using microscale on-chip transformers[J]. Elektronik magazine, 2003.

冯勇, 刘诗斌, 李晓骏.一种新型CMOS施密特触发器[J].计算机测量与控制, 2008, 16(11):1692-1694. DOI: 1692

张风体.一种基于片上变压器的数字隔离器编解码方案[J].微电子学与计算机, 2014, 31(1):164-167. DOI: 164

Cheng Ran, Chen Bo, Luo Danting, et al. Direct extraction method of equivalent circuit parameters for stacked transformer[J]. Journal Of Infrared And Millimeter Waves, 2016, 35(2): 172-176. DOI: 172

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