In order to solve the problem that the memory test data is mapped to specific failed cells with low efficiency and insufficient precision
this paper proposes a memory test-assisted analysis method. Firstly
the memory compiler will automatically generate the physical coordinate file of the storage array map after modifying it. Then the failure information of the storage unit is addressed in the generated coordinate file to find out the physical coordinates of the failure storage unit in the map. Finally
through the information of coordinate
the decoding information of the failed storage unit will be automatically output
as well as the physical coordinate two-dimensional image (of the failed storage unit) located in the entire storage array.
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references
O'Neil P E. Model 204 architecture and perfo-rmance[C]. In: Proceedings of the 2ndInternatio-nal Workshop on High Performance Transacti-on Systems. London, UK: Springer 1987, 40-59.
VanSchaik S J, de Moor O.A memory effic-ient reachability data structure through bit vec-tor compression[C].In: Proceedings of the 2011 ACM SIGMOD International Conference on M-anagement of Data.Athens, Greece: ACM, 2011.913-924.
O'Neil P E. Quass D.Improved query perfor-mance with variant indexes[C].ACM SIGMOD R-ecord, 1997, 26(2): 38-49.