Design and Implementation of an FTL Algorithm Verification Platform Based on NAND Flash

YIN Zi-hang; TANG Lei; SHEN Xu-bang

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Design and Implementation of an FTL Algorithm Verification Platform Based on NAND Flash

更新时间：2026-09-04

- Design and Implementation of an FTL Algorithm Verification Platform Based on NAND Flash
- Vol. 35, Issue 11, Pages: 128-133(2018)
- 作者机构：
  
  西安微电子技术研究所,陕西,西安,710054
- 作者简介：
- 基金信息：
- DOI：
  CLC：
- Published：2018
- 稿件说明：
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尹子航, 唐磊, 沈绪榜. 一种基于NAND Flash的FTL算法验证平台的设计与实现[J]. 微电子学与计算机, 2018, 35(11): 128-133.

YIN Zi-hang, TANG Lei, SHEN Xu-bang. Design and Implementation of an FTL Algorithm Verification Platform Based on NAND Flash[J]. 2018, 35(11): 128-133.
尹子航, 唐磊, 沈绪榜. 一种基于NAND Flash的FTL算法验证平台的设计与实现[J]. 微电子学与计算机, 2018, 35(11): 128-133. DOI：

YIN Zi-hang, TANG Lei, SHEN Xu-bang. Design and Implementation of an FTL Algorithm Verification Platform Based on NAND Flash[J]. 2018, 35(11): 128-133. DOI：

摘要

闪存转换层(FTL)算法的设计与开发对于固态硬盘的整体性能至关重要

由于缺乏错误检测机制

目前现有的算法验证平台检验结果与真实结果差距较大.本文提出一种基于NAND Flash的FTL算法验证平台

通过建立基于NAND Flash存储系统的软件平台

模拟NAND Flash的操作特性

增加错误检测机制

模拟真实操作环境

完成FTL算法的验证.本文对软件平台的整体设计和核心模块进行了分析描述.最后

在该软件平台与真实闪存设备上运行FTL算法完成模拟实验

实验证明两者误差范围在7%以内.本文提出的一种基于NAND Flash的FTL算法验证平台为验证FTL算法提供了一种便捷工具

同时提高了存储系统的可靠性

缩短了算法开发的周期

降低了产品成本.

Abstract

At present

the design of FTL algorithm is crucial to the overall performance of the SSD. In view of the shortcomings of large gap between the verification platform and the real operation at home and abroad

this paper presents an FTL algorithm verification platform based on NAND Flash. Through the establishment of a NAND flash-based storage system software platform

simulating the operation characteristics of NAND Flash

adding the error detection mechanism

simulating the real operation environment

and completing the FTL algorithms verification. In this paper

the overall design and core module of the software platform are analyzed and described. Finally

the FTL algorithm is run on the software platform and the real flash memory device to complete the simulation experiment. The experiment proves that the error range is within 7%. This paper proposes a NAND Flash based FTL algorithm verification platform

which provides a convenient tool to verify FTL algorithm

and improves the reliability of storage system

shortens the cycle of algorithm development

and reduces the cost of products.

关键词

Keywords

references

Kwon S J, Ranjitkar A, Ko Y B, et al. FTL algorithms for NAND-type flash memories.[J]. Design Automation for Embedded Systems, 2011, 15(3-4):191-224. DOI: 191

Seungjae Baek, Heekwon Park, Jongmoo Choi. Improving the Reliability and Performance of the YAFFS Flash File System.[J]. IEICE Trans.inf.%Syst, 2011, 94(12):2528-2532. DOI: 2528

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Lu K, Jin P Q, Yang P Y, et al. Adaptive in-page logging for flash- memory storage systems[J]. Frontiers of Computer Science, 2014, 8(1):131-144. DOI: 131

时正, 陈香兰, 纪金松, 等.大容量NAND Flash文件系统中的地址映射算法研究[J].小型微型计算机系统, 2010, 31(1):155-159. DOI: 155

郑文静, 李明强, 舒继武. Flash存储技术[J].计算机研究与发展, 2010, 47(4):716-726. DOI: 716

Park C, Cheon W, Kang J U K, et al. A reconfigurable FTL (flash translation layer) architecture for NAND flash-based applications.[J]. ACM Transaction on Embedded Computing Systems, 2008, 7(4):1-23. DOI: 1

张雯, 崔建杰, 张新.一种多通道NAND Flash阵列的坏块管理方案[J].电子器件, 2014(5):816-821. DOI: 816

蔡晓乐, 张亚棣, 李亚晖, 等.基于区域页级映射的闪存转换层设计[J].微电子学与计算机, 2016, 33(4):32-36. DOI: 32

Park C, Cheon W, Lee Y, et al. A Re-configurable FTL (Flash Translation Layer) Architecture for NAND Flash based Applications[J]. Acm Transactions on Embedded Computing Systems, 2008, 7(4):202-208. DOI: 202

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