BOSIO A, DILILLO L, GIRARD P, et al.Advanced Test Methods for SRAMs [M].Springer US, 2010.

JOSEPH J, PATRIKAR R.Impact of Fin Width and Graded Channel Doping on the Performance of 22nm SOI FinFET[M]//VLSI Design and Test.Springer Berlin Heidelberg, 2013:153-159.

HARUTUNYAN G, VARDANIAN V A, ZORIAN Y.Minimal March Tests for Detection of Dynamic Faults in Random Access Memories [J].Journal of Electronic Testing, 2007, 23(1):55-74. DOI: 55

BENSO A, BOSIO A, CARLO S D, et al.Automatic March tests generation for static and dynamic faults in SRAMs[C]//Test Symposium, 2005.European.IEEE, 2005: 122-127.

石磊, 王小力.一种基于存储器故障原语的March测试算法研究[J].微电子学, 2009, 39(2):251-255. DOI: 251

HAMDIOUI S, GAYDADJIEV G N, GOOR A J V.A Fault Primitive Based Analysis of Dynamic Memory Faults[C]//IEEE 14 Annual Workshop on Circuits, Systems and Signal Processing.Veldhoven, Netherlands.IEEE, 2003: 84-89.

HARUTYUNYAN G, TSHAGHARYAN G, VARDANIAN V, et al.Fault modeling and test algorithm creation strategy for FinFET-based memories[C]//Vlsi Test Symposium.IEEE, 2014: 1-6.

HARTYUNYAN G, SHOUKOURIAN S, VARDANIAN V, et al.Extending fault periodicity table for testing faults in memories under 20nm[C]//IEEE East-West Design% Test Symposium.IEEE, 2015: 1-4.

MARINESCU M.Simple and Efficient Algorithms for Functional RAM Testing[C]//International Test Conference 1982, Philadelphia, Pa, USA.DBLP, 1982: 236-239.

DU L, ZHAO H, YANG W, et al.Optimization of STI oxide recess uniformity for FinFET beyond 20nm[C]// Semiconductor Technology International Conference.IEEE, 2015: 1-4.

HAMDIOUI S, Al-ARS Z, GOOR A J V D.Testing Static and Dynamic Faults in Random Access Memories[C]// IEEE Vlsi Test Symposium.IEEE Computer Society, 2002: 395.