A Sigma-Delta modulator for magnetoresistive angle sensor is designed using XH018 0.35 μm CMOS process. The finite gain of the actual amplifier results in a pole shift in the transfer function
which will affect the accuracy of ADC. In this paper
the finite gain compensation technique is adopted to reduce the effect of operational amplifier gain on switched capacitor integrator. The structure of the modulator is 2 Order 1 Bit full feedback
with a signal bandwidth of 12 KHz and a sampling frequency of 6.25 MHz. The simulation results show that the overall power consumption of the modulator is 4mW under the 2.5V supply voltage. The layout of the core circuit is 0.45 mm×0.3 mm. At -40℃~150℃
the ENOB of each corner is greater than 16.5bit. FOM=165.
RICHARD SCHREIER, JOSé SILVA, JESPER S. Design-Oriented Estimation of Thermal Noise in Switched-Capacitor Circuits[J]. IEEE Transaction on Circuits and System, 2005, 52(11):2358- 2368. DOI: 2358
Hoboken JOSE M. DELO ROSA. CMOS Sigma-Delta Converters Practical Design Guid[M]. Hoboken: John Wiley % Sons, 2013.
Hoboken RICHARD SCHREIER. Understanding Delta-Sigma Data Converters[M]. Hoboken: John Wiley % Sons, 2005.