Pixel write combining buffer technology for pixel cache low thrash of GPU

ZHANG Shu; TIAN Ze; ZHENG Xin-jian; ZHANG Jun; XU Hong-jie; WANG Wei

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Pixel write combining buffer technology for pixel cache low thrash of GPU

更新时间：2026-09-04

- Pixel write combining buffer technology for pixel cache low thrash of GPU
- Vol. 36, Issue 7, Pages: 93-97(2019)
- 作者机构：
  
  1. 西安翔腾微电子科技有限公司,陕西,西安,710068
  2. 中国航空工业集团西安航空计算技术研究所,陕西,西安,710068
  3. 集成电路与微系统设计航空科技重点实验室,陕西,西安,710068
- 作者简介：
- 基金信息：
- DOI：
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- Published：2019
- 稿件说明：
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张淑, 田泽, 郑新建, 张骏, 许宏杰, 王维. 面向低抖动GPU像素Cache的像素写合并缓冲技术[J]. 微电子学与计算机, 2019, 36(7): 93-97.

ZHANG Shu, TIAN Ze, ZHENG Xin-jian, et al. Pixel write combining buffer technology for pixel cache low thrash of GPU[J]. 2019, 36(7): 93-97.
张淑, 田泽, 郑新建, 张骏, 许宏杰, 王维. 面向低抖动GPU像素Cache的像素写合并缓冲技术[J]. 微电子学与计算机, 2019, 36(7): 93-97. DOI：

ZHANG Shu, TIAN Ze, ZHENG Xin-jian, et al. Pixel write combining buffer technology for pixel cache low thrash of GPU[J]. 2019, 36(7): 93-97. DOI：

摘要

图形处理器像素Cache访问时抖动发生频繁

很大程度的影响了图形处理器的性能.通过研究图形处理器中多数据流处理的并行化特征

提出了一种像素写合并缓冲技术

在数据写入像素Cache前

根据地址对像素进行合并后再对Cache进行访问

能够减少对Cache的访问次数

降低Cache抖动

提高Cache性能.使用写合并缓冲技术能将Cache抖动平均降低60%

最大降低70%

测试表明像素Cache的写合并缓冲技术能够降低Cache的抖动

非常适用于嵌入式图形处理器像素Cache的设计.

Abstract

The thrashing of pixel cache in GPU is frequent

which greatly decrease the performance of GPU. Based on the research of the parallelization characteristics of multi data stream processing in GPU

a pixel write merging buffer technique is proposed. The cache access is merged according to the address before. It can reduce the number of cache access

reduce the cache thrashing

and improve the performance of the cache. The pixel write combining buffer technology can reduce the average cache trash by 60% and the maximum reduction of 70%. The result shows that the write merge buffer technology of pixel cache can reduce the cache thrash

and is very suitable for the design of the pixel cache of the embedded graphic processor.

关键词

Keywords

references

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