A low-cost PMU circuit for 3D NAND Flash memory testing

ZHANG Xi; WANG Xin; TONG Wei; HUO Zong-liang

Chinese

您当前的位置：

首页 >

文章列表页 >

A low-cost PMU circuit for 3D NAND Flash memory testing

更新时间：2026-09-04

- A low-cost PMU circuit for 3D NAND Flash memory testing
- Vol. 37, Issue 5, Pages: 1-5(2020)
- 作者机构：
  
  1. 中国科学院大学机构,北京,101408
  2. 中国科学院机构微电子研究所,北京,100029
  3. 长江存储科技有限责任公司,湖北,武汉,430200
- 作者简介：
- 基金信息：
- DOI：
  CLC：
- Published：2020
- 稿件说明：
移动端阅览
张玺, 王颀, 童炜, 霍宗亮. 一种用于三维闪存测试的低成本PMU电路[J]. 微电子学与计算机, 2020, 37(5): 1-5.

ZHANG Xi, WANG Xin, TONG Wei, et al. A low-cost PMU circuit for 3D NAND Flash memory testing[J]. 2020, 37(5): 1-5.
张玺, 王颀, 童炜, 霍宗亮. 一种用于三维闪存测试的低成本PMU电路[J]. 微电子学与计算机, 2020, 37(5): 1-5. DOI：

ZHANG Xi, WANG Xin, TONG Wei, et al. A low-cost PMU circuit for 3D NAND Flash memory testing[J]. 2020, 37(5): 1-5. DOI：

摘要

为了改善3D NAND测试机价格昂贵导致的闪存芯片成本过高的问题，提出了一种新的基于FPGA的用于3D NAND闪存芯片直流参数测试的低成本PMU(精密测量单元)电路.利用FPGA灵活的可编程特性，通过对ADC、DAC和继电器等分立元件工作的控制，实现了具有FVMI(加电压测电流)、FIMV(加电流测电压)等直流参数测试功能的PMU电路.该PMU电路已应用于YMTC自研3D NAND Flash测试平台，可以对3D NAND的直流参数进行准确测量，并且测试机台的成本只有大型ATE机台的0.175%，从而缓解了芯片测试成本过高的问题.

Abstract

In order to improve the cost of the chip caused by the high price of the 3D NAND tester

a new FPGA-based low-cost PMU (precision measurement unit) circuit for DC parameter testing of 3D NAND memory chips is proposed. The flexible programmable feature of the FPGA is used to implement the PMU circuit by controlling the discrete components of the ADC

DAC and relays so that the PMU circuit can test DC parameters with FVMI (Force Voltage Measure Current) and FIMV (Force Current Measure Voltage) function. The PMU circuit has been applied to the YMTC self-developed 3D NAND Flash test platform

which can accurately measure the DC parameters of the 3D NAND

and the cost of the test machine is only 0.175% of the cost of the large ATE machine

thus alleviating the problem of excessive test cost of the chip.

关键词

Keywords

references

LEE Y K, SUNG S K, SIM J S, et al. Multi-level vertical channel SONOS nonvolatile memory on SOI[C]// VLSI Technology, Digest of Technical Papers, 2002 Symposium on. Honolulu, HI, USA, 2002.

Netherlands MICHELONI R, CRIPPA L, MARELLI A. Inside NAND Flash Memories[M]. Netherlands:Springer, 2010:22-26. DOI: 22

时万春.现代集成电路测试技术[M].北京: 化学工业出版社, 2006: 3-11/282-294.

SUH K D, SUH B H, UM Y H, et al. A 3.3 V 32 Mb NAND flash memory with incremental step pulse programming scheme[C]//Solid-State Circuits Conference, 42nd ISSCC, 1995 IEEE International, San Francisco, USA, 1995: 128-129.

刘军.大功率模拟集成电路直流参数测试研究与实现[D].成都: 电子科技大学, 2010.

李建辉.大功率模拟集成电路直流参数测试[D].成都: 电子科技大学, 2011.

郝叶军, 詹惠琴.数字集成电路功能测试仪的设计与实现[J].电子测试, 2010(11):1-5. DOI: 1

Views

下载量

CSCD

Alert me when the article has been cited

提交

Tools

Publicity Resources

Design of a shared-memory-based spaceborne data switching architecture

The linear leastsquares positioning algorithm based on FPGA

Algorithm optimization and hardware acceleration for YOLO post processing

Optimization and implementation of FPGA-based H.264 variable block motion estimation algorithm

A secure encryption authentication system based on integrated structure of TRNG and PUF

Related Author

WANG Runze

TANG Lei

KUANG Nailiang

LIANG Yong

FENG Zhouwu

CUI Mohan

CHEN Tao

ZHU Yifei

Related Institution

Xi'an Microelectronics Technology Institute

School of Electronics and Communication Engineering, East China Normal University

School of Microelectronics, University of Science and Technology of China

Xi'an Institute of Microelectronics Technology

School of Physics and Electronic Engineering, Shanxi University

AI问答

Postal code：100079
Tel：（010）53879206 Email：tmw@bjxintong.com.cn
Technical support is provided by Beijing Founder electronics co., LTD 京ICP备09082226号-64 京公网安备11010602201714号
It is recommended to read the content of this site in Chrome&IE9+. Please switch to extreme mode in browser 360.
Cookies We use cookies to help provide and enhance our service and tailor content. By continuing, you agree to the use of cookies.

⁰