High-Performance and reliable processor design technology for military electronic system

ZHANG Hai-jin; SU Ruo-hao; CUI Yuan-yuan; LOU Mian; LIU Si-yuan; GUO Na-na

Chinese

您当前的位置：

首页 >

文章列表页 >

High-Performance and reliable processor design technology for military electronic system

更新时间：2026-09-04

- High-Performance and reliable processor design technology for military electronic system
- Vol. 37, Issue 3, Pages: 66-70(2020)
- 作者机构：
  
  西安微电子技术研究所,陕西,西安,710054
- 作者简介：
- 基金信息：
- DOI：
  CLC：
- Published：2020
- 稿件说明：
移动端阅览
张海金, 苏若皓, 崔媛媛, 娄冕, 刘思源, 郭娜娜. 面向军用电子系统的高性能高可靠处理器设计技术[J]. 微电子学与计算机, 2020, 37(3): 66-70.

ZHANG Hai-jin, SU Ruo-hao, CUI Yuan-yuan, et al. High-Performance and reliable processor design technology for military electronic system[J]. 2020, 37(3): 66-70.
张海金, 苏若皓, 崔媛媛, 娄冕, 刘思源, 郭娜娜. 面向军用电子系统的高性能高可靠处理器设计技术[J]. 微电子学与计算机, 2020, 37(3): 66-70. DOI：

ZHANG Hai-jin, SU Ruo-hao, CUI Yuan-yuan, et al. High-Performance and reliable processor design technology for military electronic system[J]. 2020, 37(3): 66-70. DOI：

摘要

随着军用电子系统的信息化、智能化、集成化水平不断提升，其所需实现的任务种类和数量越来越多，其所处作战环境也越来越复杂，使得其对高性能高可靠处理器的需求越来越迫切.针对军用电子系统对处理器的高性能应用需求，本文运用双发射指令执行技术、分支预测优化技术以及紧耦合的片上存储管理技术等提升处理器的指令执行效率；针对军用电子系统对处理器的高可靠应用需求，本文应用基于锁步结构的指令恢复技术来提高处理器的容错能力，并采用ECC校验技术和冗余备份技术来提高片上存储系统的纠检错能力和可靠性水平.最终，实现了一款性能达到2 DMIPS/MHz、主频达到300 MHz的面向军用电子系统高性能高可靠处理器.

Abstract

With the development of the military electronic system information intelligence integration level

it needs to realize more and more kinds of tasks in more and more complex environment

which increases the requirements for High-Performance and High-reliable Processor. In order to meet the high performance application of processor in military electronic system

Dual-issue instruction execution technology

Branch prediction optimization technology

and TCM memory Management technology is used in this paper. For the high reliable using

lock-step instruction recovery technology is used in this paper for increasing the fault-tolerance of CPU. Also

ECC and redundant backup technology is used to improving the correction capability and reliability. Finally

an high-performance and reliable processor is fabricated on 90nm

which main frequency reaches 300 MHz

2.0 D MIPS/MHz.

关键词

Keywords

references

MITRA S, SEIFERT N, ZHANG M, et al, Robust system design with buildt-in soft-error resilience[J]. IEEE Transactions on Computer, 2005, 38(2):43-52. DOI: 43

傅忠传, 陈红松, 崔刚, 等.处理器容错技术研究与展望[J].计算机研究与发展, 2007, 44(1):154-160. DOI: 154

单书畅, 胡瑜, 李晓维.多核处理器的核级冗余容错技术[C]//第六届中国测试学术会议论文集(CTC2010), 中国, 杭州, 2010: 290-295.

王立蒙, 电磁脉冲对典型电子元器件的毁伤机理[D].太原: 中北大学, 2016.

李建立, 面向瞬时故障的可配置容错技术研究[D].长沙: 国防科技大学, 2013.

SHIVAKUMAR P, KISTLER M, KECKLER S W, et al. Modeling the Effect of Technology Trends on the Soft Error Rate of Combinational Logic [C]//Proceedings of the International Conference on Dependable Systems Networks. Washington, DC, USA, 2002: 389~398.

白鹭, 王建生, 沈华, 机载嵌入式系统中的多和处理架构研究与分析[J].航空计算技术, 2016, 46(5): 127-130.

Views

下载量

CSCD

Alert me when the article has been cited

提交

Tools

Publicity Resources

Steganography model guided by attention mechanism and improved dense convolution

Microservices anomaly detection based on the correlation of monitoring metrics

Aerial vehicle detection algorithm based on multi-scale fusion and small-object enhancement

Design of ultra-low power real-time clock circuits

Simulation on the DC characteristics of double heterojunction p-GaN HEMT with AlN/GaN hybrid buffer layer

Related Author

No data

Related Institution

No data

AI问答

Postal code：100079
Tel：（010）53879206 Email：tmw@bjxintong.com.cn
Technical support is provided by Beijing Founder electronics co., LTD 京ICP备09082226号-64 京公网安备11010602201714号
It is recommended to read the content of this site in Chrome&IE9+. Please switch to extreme mode in browser 360.
Cookies We use cookies to help provide and enhance our service and tailor content. By continuing, you agree to the use of cookies.

⁰