A novel time synchronization method based on dynamic reconfigurable bus

WANG Shan; WANG Ying; ZHOU Ji-qin; LIU Yi-xiao; ZHANG Wei-gong

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A novel time synchronization method based on dynamic reconfigurable bus

更新时间：2026-09-04

- A novel time synchronization method based on dynamic reconfigurable bus
- Vol. 37, Issue 11, Pages: 54-60(2020)
- 作者机构：
  
  1. 首都师范大学机构信息工程学院,北京,102248
  2. 电子系统可靠性技术北京市重点实验室机构,北京,100048
  3. 首都师范大学数学科学学院,北京,100048
  4. 北京成像理论与技术高精尖创新中心,北京,100048
- 作者简介：
- 基金信息：
- DOI：
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- Published：2020
- 稿件说明：
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王姗, 王莹, 周继芹, 刘屹霄, 张伟功. 基于动态可重构总线的新型时间同步方法[J]. 微电子学与计算机, 2020, 37(11): 54-60.

WANG Shan, WANG Ying, ZHOU Ji-qin, et al. A novel time synchronization method based on dynamic reconfigurable bus[J]. 2020, 37(11): 54-60.
王姗, 王莹, 周继芹, 刘屹霄, 张伟功. 基于动态可重构总线的新型时间同步方法[J]. 微电子学与计算机, 2020, 37(11): 54-60. DOI：

WANG Shan, WANG Ying, ZHOU Ji-qin, et al. A novel time synchronization method based on dynamic reconfigurable bus[J]. 2020, 37(11): 54-60. DOI：

摘要

动态可重构总线UM-BUS是一种面向嵌入式系统的高速串行总线，采用可变时隙轮转方法支持多主工作模式，可实时检测故障，具有动态容错功能.为了提高总线系统在嵌入式应用中的时间确定性，保证总线节点时隙轮转的精准性.本文设计了一种能够对线路传输误差进行修正的高精度时间同步方法，并支持时间主节点故障的主动容错.在总线工作速率为1.6Gbps的实际系统中，节点同步时间误差小于50ns，时隙计数误差小于1个总线位时.

Abstract

UM-BUS is a high-speed serial bus oriented to embedded systems

the variable time slot rotation method is adopted to support multi-master working mode

which can detect faults in real time and has dynamic fault tolerance. In order to improve the time certainty of the bus system in embedded applications and ensure the accuracy of the time slot rotation of the bus node.This paper designs a high-precision time synchronization method that can correct line transmission errors and supports active fault tolerance for time master node failures. In an actual system with a bus operating rate of 1.6Gbps

the node synchronization time error is less than 50ns

and the time slot count error is less than 1 bus bit.

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references

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